The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo descreve um esquema de controle de tráfego distribuído para grandes sistemas de comutação ATM multiestágio. Quando um novo circuito virtual deve ser adicionado de alguma unidade de interface de linha (LU) de origem a uma LU de destino, o sistema deve encontrar um caminho ideal através do sistema para acomodar o novo circuito. Os sistemas convencionais possuem um processador de controle central e linhas de controle para gerenciar a largura de banda de todos os links nos sistemas. O processador de controle central lida com todos os circuitos virtuais, mas tem dificuldade em fazer isso quando o sistema de comutação se torna grande devido à capacidade limitada do processador central de lidar com o número de circuitos virtuais. Um grande sistema de comutação com taxa de transferência de classe Tbit/s requer um esquema de controle de tráfego distribuído. Em nosso sistema de comutação proposto, cada porta dos switches básicos possui seu próprio monitor de tráfego. As células de operação, administração e manutenção (OAM) definidas dentro do sistema transportam as informações de congestionamento de caminho para as LUs, permitindo que cada LU roteie novos circuitos virtuais de forma independente. Não são necessários um processador de controle central e linhas de controle. O desempenho do sistema proposto depende do intervalo entre as células OAM. Este artigo mostra como um intervalo ideal pode ser determinado para maximizar a largura de banda das células do usuário. Este esquema de controle de tráfego se adequará aos futuros sistemas de comutação ATM de Tbit/s.
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Kohei NAKAI, Eiji OKI, Naoaki YAMANAKA, "A Distributed Traffic Control Scheme for Large-Scale Multi-Stage ATM Switching Systems" in IEICE TRANSACTIONS on Communications,
vol. E83-B, no. 2, pp. 231-237, February 2000, doi: .
Abstract: This paper describes a distributed traffic control scheme for large multi-stage ATM switching systems. When a new virtual circuit is to be added from some source line-interface unit (LU) to a destination LU, the system must find an optimal path through the system to accommodate the new circuit. Conventional systems have a central control processor and control lines to manage the bandwidth of all the links in the systems. The central control processor handles all the virtual circuits, but have trouble doing this when the switching system becomes large because of the limited ability of the central processor to handle the number of virtual circuits. A large switching system with Tbit/s-class throughput requires a distributed traffic control scheme. In our proposed switching system, each port of the basic switches has its own traffic monitor. Operation, administration, and maintenance (OAM) cells that are defined inside the system carry the path-congestion information to the LUs, enabling each LU to route new virtual circuits independently. A central control processor and control lines are not required. The performance of the proposed system depends on the interval between OAM cells. This paper shows how an optimal interval can be determined in order to maximize the bandwidth for user cells. This traffic control scheme will suit future Tbit/s ATM switching systems.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e83-b_2_231/_p
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@ARTICLE{e83-b_2_231,
author={Kohei NAKAI, Eiji OKI, Naoaki YAMANAKA, },
journal={IEICE TRANSACTIONS on Communications},
title={A Distributed Traffic Control Scheme for Large-Scale Multi-Stage ATM Switching Systems},
year={2000},
volume={E83-B},
number={2},
pages={231-237},
abstract={This paper describes a distributed traffic control scheme for large multi-stage ATM switching systems. When a new virtual circuit is to be added from some source line-interface unit (LU) to a destination LU, the system must find an optimal path through the system to accommodate the new circuit. Conventional systems have a central control processor and control lines to manage the bandwidth of all the links in the systems. The central control processor handles all the virtual circuits, but have trouble doing this when the switching system becomes large because of the limited ability of the central processor to handle the number of virtual circuits. A large switching system with Tbit/s-class throughput requires a distributed traffic control scheme. In our proposed switching system, each port of the basic switches has its own traffic monitor. Operation, administration, and maintenance (OAM) cells that are defined inside the system carry the path-congestion information to the LUs, enabling each LU to route new virtual circuits independently. A central control processor and control lines are not required. The performance of the proposed system depends on the interval between OAM cells. This paper shows how an optimal interval can be determined in order to maximize the bandwidth for user cells. This traffic control scheme will suit future Tbit/s ATM switching systems.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - A Distributed Traffic Control Scheme for Large-Scale Multi-Stage ATM Switching Systems
T2 - IEICE TRANSACTIONS on Communications
SP - 231
EP - 237
AU - Kohei NAKAI
AU - Eiji OKI
AU - Naoaki YAMANAKA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E83-B
IS - 2
JA - IEICE TRANSACTIONS on Communications
Y1 - February 2000
AB - This paper describes a distributed traffic control scheme for large multi-stage ATM switching systems. When a new virtual circuit is to be added from some source line-interface unit (LU) to a destination LU, the system must find an optimal path through the system to accommodate the new circuit. Conventional systems have a central control processor and control lines to manage the bandwidth of all the links in the systems. The central control processor handles all the virtual circuits, but have trouble doing this when the switching system becomes large because of the limited ability of the central processor to handle the number of virtual circuits. A large switching system with Tbit/s-class throughput requires a distributed traffic control scheme. In our proposed switching system, each port of the basic switches has its own traffic monitor. Operation, administration, and maintenance (OAM) cells that are defined inside the system carry the path-congestion information to the LUs, enabling each LU to route new virtual circuits independently. A central control processor and control lines are not required. The performance of the proposed system depends on the interval between OAM cells. This paper shows how an optimal interval can be determined in order to maximize the bandwidth for user cells. This traffic control scheme will suit future Tbit/s ATM switching systems.
ER -