The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo investiga um modelo de dispositivo da corrente de potência usada para um LSI/IC. O modelo é proposto para analisar o ruído do barramento de potência em placas de circuitos digitais. Este modelo é definido no domínio da frequência e construído com uma impedância interna equivalente e uma fonte de corrente interna equivalente. Conseqüentemente, a corrente de saída do modelo é afetada pela impedância do barramento de potência, como a capacitância dos capacitores de bypass e a indutância parasita da fiação do barramento de potência. Portanto, o modelo é útil para analisar a eficácia dos capacitores de bypass e da fiação do barramento de potência. A estrutura de impedância interna equivalente para um IC lógico simples, como 74HCXX, pode ser representada como um RLC circuito em série. Esses parâmetros são identificados aplicando o método dos mínimos quadrados. Para demonstrar a validade do modelo, foi realizado um estudo experimental. Como resultado, foi demonstrado que a corrente de saída do modelo corresponde à corrente medida sob uma variedade de níveis de impedância do barramento de potência dentro de 6 dB.
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Yukihiro FUKUMOTO, Yasuo TAKAHATA, Osami WADA, Yoshitaka TOYOTA, Takuya MIYASHITA, Ryuji KOGA, "Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits" in IEICE TRANSACTIONS on Communications,
vol. E84-B, no. 11, pp. 3041-3049, November 2001, doi: .
Abstract: This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e84-b_11_3041/_p
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@ARTICLE{e84-b_11_3041,
author={Yukihiro FUKUMOTO, Yasuo TAKAHATA, Osami WADA, Yoshitaka TOYOTA, Takuya MIYASHITA, Ryuji KOGA, },
journal={IEICE TRANSACTIONS on Communications},
title={Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits},
year={2001},
volume={E84-B},
number={11},
pages={3041-3049},
abstract={This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits
T2 - IEICE TRANSACTIONS on Communications
SP - 3041
EP - 3049
AU - Yukihiro FUKUMOTO
AU - Yasuo TAKAHATA
AU - Osami WADA
AU - Yoshitaka TOYOTA
AU - Takuya MIYASHITA
AU - Ryuji KOGA
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E84-B
IS - 11
JA - IEICE TRANSACTIONS on Communications
Y1 - November 2001
AB - This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.
ER -