The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Uma nova metodologia de determinação de parâmetros de linhas de transmissão de interconexão IC e uma nova técnica de simulação rápida para linhas de transmissão não uniformes são apresentadas e verificadas. O parâmetro de capacitância é uma forte função do efeito de blindagem entre as camadas, enquanto o substrato de silício tem um efeito substancial no parâmetro de indutância. Assim, eles são levados em consideração para determinar os parâmetros. Em seguida, os parâmetros virtuais baseados em linha reta por unidade de comprimento são determinados para realizar a simulação transitória rápida das linhas de transmissão não uniformes. Foi demonstrado que não apenas o efeito de indutância devido a um substrato de silício, mas também o efeito de blindagem entre as camadas são demasiado significativos para serem negligenciados. Além disso, uma técnica de redução de ordem de modelo é integrada no Berkeley SPICE, a fim de demonstrar que os parâmetros por unidade de comprimento baseados em linha reta virtual podem ser eficientemente empregados para a simulação de resposta transitória rápida das complicadas estruturas de interconexão multicamadas. Como a metodologia é muito eficiente e precisa, ela pode ser empregada de forma útil para ferramentas IC CAD de projeto de circuitos VLSI de alto desempenho.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copiar
Woojin JIN, Hanjong YOO, Yungseon EO, "Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 6, pp. 955-966, June 1999, doi: .
Abstract: A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_6_955/_p
Copiar
@ARTICLE{e82-c_6_955,
author={Woojin JIN, Hanjong YOO, Yungseon EO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits},
year={1999},
volume={E82-C},
number={6},
pages={955-966},
abstract={A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.},
keywords={},
doi={},
ISSN={},
month={June},}
Copiar
TY - JOUR
TI - Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 955
EP - 966
AU - Woojin JIN
AU - Hanjong YOO
AU - Yungseon EO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1999
AB - A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.
ER -