The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo resume métodos de redução de potência aplicáveis a sistemas de barramento VLSI em termos de redução de oscilação de sinal, redução de capacitância efetiva e redução de transição de sinal, que foram estudados no grupo de pesquisa dos autores. Em cada método o conceito básico é revisado rapidamente juntamente com alguns exemplos de sua aplicação. Uma perspectiva futura também é descrita na conclusão.
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Kunihiro ASADA, Makoto IKEDA, Satoshi KOMATSU, "Approaches for Reducing Power Consumption in VLSI Bus Circuits" in IEICE TRANSACTIONS on Electronics,
vol. E83-C, no. 2, pp. 153-160, February 2000, doi: .
Abstract: This paper summarizes power reduction methods applicable for VLSI bus systems in terms of reduction of signal swing, effective capacitance reduction and reduction of signal transition, which have been studied in authors' research group. In each method the basic concept is reviewed quickly along with some examples of its application. A future perspective is also described in conclusion.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e83-c_2_153/_p
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@ARTICLE{e83-c_2_153,
author={Kunihiro ASADA, Makoto IKEDA, Satoshi KOMATSU, },
journal={IEICE TRANSACTIONS on Electronics},
title={Approaches for Reducing Power Consumption in VLSI Bus Circuits},
year={2000},
volume={E83-C},
number={2},
pages={153-160},
abstract={This paper summarizes power reduction methods applicable for VLSI bus systems in terms of reduction of signal swing, effective capacitance reduction and reduction of signal transition, which have been studied in authors' research group. In each method the basic concept is reviewed quickly along with some examples of its application. A future perspective is also described in conclusion.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - Approaches for Reducing Power Consumption in VLSI Bus Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 153
EP - 160
AU - Kunihiro ASADA
AU - Makoto IKEDA
AU - Satoshi KOMATSU
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E83-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2000
AB - This paper summarizes power reduction methods applicable for VLSI bus systems in terms of reduction of signal swing, effective capacitance reduction and reduction of signal transition, which have been studied in authors' research group. In each method the basic concept is reviewed quickly along with some examples of its application. A future perspective is also described in conclusion.
ER -