The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo descreve um modelo eficaz que reproduz a dependência do processo fonte/dreno (S/D) do efeito reverso de canal curto (RSCE) da tensão limite do MOSFET (Vth). É útil para modelagem local que é eficaz dentro das condições limitadas do processo. O modelo proposto é baseado na física onde o fator chave do RSCE é o acúmulo de dopantes no Si/SiO2 interface. O objetivo do modelo é que o TCAD seja efetivamente utilizado como uma ferramenta de solução rápida. O custo de cálculo é muito menor que um modelo de difusão em pares, pois o modelo é implementado em um simulador de processo convencional que resolve uma equação para cada impureza. A capacidade do modelo simplificado é investigada quanto à dependência de várias condições de processo no RSCE. Usando nosso modelo, também relatamos a aplicação dos MOSFETs reais de canal n e canal p.
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Hirokazu HAYASHI, Noriyuki MIURA, Hirotaka KOMATSUBARA, Marie MOCHIZUKI, Koichi FUKUDA, "A Simplified Dopant Pile-Up Model for Process Simulators" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 12, pp. 2117-2122, December 2002, doi: .
Abstract: This paper describes an effective model which reproduces the dependence on the source/drain (S/D) process of the reverse short channel effect (RSCE) of the MOSFET threshold voltage (Vth). It is useful for local modeling which is effective within the limited process conditions. The proposed model is based on the physics where the key factor of RSCE is the dopant pile-up in the Si/SiO2 interface. The purpose of the model is for TCAD to be put to actual use as a quick solution tool. The calculation cost is much lower than a pair diffusion model, because the model is implemented in a conventional process simulator that solves one equation for each impurity. The capability of the simplified model is investigated for the dependence of various process conditions on the RSCE. Using our model, we also report the application of both the actual n-channel and p-channel MOSFETs.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_12_2117/_p
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@ARTICLE{e85-c_12_2117,
author={Hirokazu HAYASHI, Noriyuki MIURA, Hirotaka KOMATSUBARA, Marie MOCHIZUKI, Koichi FUKUDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Simplified Dopant Pile-Up Model for Process Simulators},
year={2002},
volume={E85-C},
number={12},
pages={2117-2122},
abstract={This paper describes an effective model which reproduces the dependence on the source/drain (S/D) process of the reverse short channel effect (RSCE) of the MOSFET threshold voltage (Vth). It is useful for local modeling which is effective within the limited process conditions. The proposed model is based on the physics where the key factor of RSCE is the dopant pile-up in the Si/SiO2 interface. The purpose of the model is for TCAD to be put to actual use as a quick solution tool. The calculation cost is much lower than a pair diffusion model, because the model is implemented in a conventional process simulator that solves one equation for each impurity. The capability of the simplified model is investigated for the dependence of various process conditions on the RSCE. Using our model, we also report the application of both the actual n-channel and p-channel MOSFETs.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - A Simplified Dopant Pile-Up Model for Process Simulators
T2 - IEICE TRANSACTIONS on Electronics
SP - 2117
EP - 2122
AU - Hirokazu HAYASHI
AU - Noriyuki MIURA
AU - Hirotaka KOMATSUBARA
AU - Marie MOCHIZUKI
AU - Koichi FUKUDA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2002
AB - This paper describes an effective model which reproduces the dependence on the source/drain (S/D) process of the reverse short channel effect (RSCE) of the MOSFET threshold voltage (Vth). It is useful for local modeling which is effective within the limited process conditions. The proposed model is based on the physics where the key factor of RSCE is the dopant pile-up in the Si/SiO2 interface. The purpose of the model is for TCAD to be put to actual use as a quick solution tool. The calculation cost is much lower than a pair diffusion model, because the model is implemented in a conventional process simulator that solves one equation for each impurity. The capability of the simplified model is investigated for the dependence of various process conditions on the RSCE. Using our model, we also report the application of both the actual n-channel and p-channel MOSFETs.
ER -