The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Fabricamos junções de borda de rampa com barreiras, modificando a superfície e integrando planos de solo. As junções fabricadas tinham características de corrente-tensão consistentes com o modelo resistivo de junção em derivação. Também obtivemos um spread de 1 sigma na corrente crítica de 7.9% para 100 junções a 4.2 K. O plano de terra reduziu a indutância da folha de um stripline por um fator de 3. A qualidade do plano de terra foi melhorada usando um recozimento em atmosfera de oxigênio após a fabricação. A indutância de folha de um contra-eletrodo com plano de aterramento era de 1.0 pH por quadrado a 4.2 K.
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Yoshihisa SOUTOME, Tokuumi FUKAZAWA, Kazuo SAITOH, Akira TSUKAMOTO, Kazumasa TAKAGI, "HTS Surface-Modified Junctions with Integrated Ground-Planes for SFQ Circuits" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 3, pp. 759-763, March 2002, doi: .
Abstract: We fabricated ramp-edge junctions with barriers by modifying surface and integrating ground-planes. The fabricated junctions had current-voltage characteristics consistent with the resistive shunted-junction model. We also obtained a 1-sigma spread in the critical current of 7.9% for 100 junctions at 4.2 K. The ground-plane reduced the sheet inductance of a stripline by a factor of 3. The quality of the ground-plane was improved by using an anneal in oxygen atmosphere after fabrication. The sheet inductance of a counter-electrode with a ground-plane was 1.0 pH per square at 4.2 K.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_3_759/_p
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@ARTICLE{e85-c_3_759,
author={Yoshihisa SOUTOME, Tokuumi FUKAZAWA, Kazuo SAITOH, Akira TSUKAMOTO, Kazumasa TAKAGI, },
journal={IEICE TRANSACTIONS on Electronics},
title={HTS Surface-Modified Junctions with Integrated Ground-Planes for SFQ Circuits},
year={2002},
volume={E85-C},
number={3},
pages={759-763},
abstract={We fabricated ramp-edge junctions with barriers by modifying surface and integrating ground-planes. The fabricated junctions had current-voltage characteristics consistent with the resistive shunted-junction model. We also obtained a 1-sigma spread in the critical current of 7.9% for 100 junctions at 4.2 K. The ground-plane reduced the sheet inductance of a stripline by a factor of 3. The quality of the ground-plane was improved by using an anneal in oxygen atmosphere after fabrication. The sheet inductance of a counter-electrode with a ground-plane was 1.0 pH per square at 4.2 K.},
keywords={},
doi={},
ISSN={},
month={March},}
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TY - JOUR
TI - HTS Surface-Modified Junctions with Integrated Ground-Planes for SFQ Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 759
EP - 763
AU - Yoshihisa SOUTOME
AU - Tokuumi FUKAZAWA
AU - Kazuo SAITOH
AU - Akira TSUKAMOTO
AU - Kazumasa TAKAGI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2002
AB - We fabricated ramp-edge junctions with barriers by modifying surface and integrating ground-planes. The fabricated junctions had current-voltage characteristics consistent with the resistive shunted-junction model. We also obtained a 1-sigma spread in the critical current of 7.9% for 100 junctions at 4.2 K. The ground-plane reduced the sheet inductance of a stripline by a factor of 3. The quality of the ground-plane was improved by using an anneal in oxygen atmosphere after fabrication. The sheet inductance of a counter-electrode with a ground-plane was 1.0 pH per square at 4.2 K.
ER -