The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo descreve técnicas de circuitos analógicos de baixa potência e baixa tensão aplicáveis a LSIs submicrométricos profundos em banda base e processamento de sinais de RF. As tendências indicam que as reduções na tensão de alimentação são inevitáveis, que a dissipação de energia não se tornará suficientemente baixa e que o desempenho melhorará continuamente. Algumas técnicas de circuito atualmente usadas para atingir esses objetivos são revisadas. A seguir, três abordagens experimentais são introduzidas. O primeiro deles é um IC operacional de amostragem e retenção CMOS com velocidade de vídeo de 1 V. O segundo é um circuito CMOS VCO operacional de alta frequência de 1 V. Finalmente, é introduzido um conversor IC abaixador DC-DC com saída de 1 V e eficiência de energia superior a 80%. Essas abordagens provam que a operação de circuitos analógicos com baixa potência e baixa tensão pode ser realizada sem sacrificar o desempenho.
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Yasuhiro SUGIMOTO, "Low-Power and Low-Voltage Analog Circuit Techniques towards the 1 V Operation of Baseband and RF LSIs" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 8, pp. 1529-1537, August 2002, doi: .
Abstract: This paper describes low-power and low-voltage analog circuit techniques applicable to deep sub-micron LSIs in baseband and RF signal processing. The trends indicate that reductions in the supply voltage are inevitable, that power dissipation will not become sufficiently low, and that performance will improve continuously. Some circuit techniques currently being used to achieve these goals are reviewed. Next, three trial approaches are introduced. The first of these is a 1 V operational video-speed CMOS sample-and-hold IC. The second is a 1 V operational high-frequency CMOS VCO circuit. Finally, a step-down DC-DC converter IC with a 1 V output and a greater than 80% power efficiency is introduced. These approaches prove that the low-power and low-voltage operation of analog circuits can be realized without sacrificing performance.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_8_1529/_p
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@ARTICLE{e85-c_8_1529,
author={Yasuhiro SUGIMOTO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Low-Power and Low-Voltage Analog Circuit Techniques towards the 1 V Operation of Baseband and RF LSIs},
year={2002},
volume={E85-C},
number={8},
pages={1529-1537},
abstract={This paper describes low-power and low-voltage analog circuit techniques applicable to deep sub-micron LSIs in baseband and RF signal processing. The trends indicate that reductions in the supply voltage are inevitable, that power dissipation will not become sufficiently low, and that performance will improve continuously. Some circuit techniques currently being used to achieve these goals are reviewed. Next, three trial approaches are introduced. The first of these is a 1 V operational video-speed CMOS sample-and-hold IC. The second is a 1 V operational high-frequency CMOS VCO circuit. Finally, a step-down DC-DC converter IC with a 1 V output and a greater than 80% power efficiency is introduced. These approaches prove that the low-power and low-voltage operation of analog circuits can be realized without sacrificing performance.},
keywords={},
doi={},
ISSN={},
month={August},}
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TY - JOUR
TI - Low-Power and Low-Voltage Analog Circuit Techniques towards the 1 V Operation of Baseband and RF LSIs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1529
EP - 1537
AU - Yasuhiro SUGIMOTO
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2002
AB - This paper describes low-power and low-voltage analog circuit techniques applicable to deep sub-micron LSIs in baseband and RF signal processing. The trends indicate that reductions in the supply voltage are inevitable, that power dissipation will not become sufficiently low, and that performance will improve continuously. Some circuit techniques currently being used to achieve these goals are reviewed. Next, three trial approaches are introduced. The first of these is a 1 V operational video-speed CMOS sample-and-hold IC. The second is a 1 V operational high-frequency CMOS VCO circuit. Finally, a step-down DC-DC converter IC with a 1 V output and a greater than 80% power efficiency is introduced. These approaches prove that the low-power and low-voltage operation of analog circuits can be realized without sacrificing performance.
ER -