The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Desenvolvemos um ADC flash de 6 bits alimentado por uma única fonte de 1.8 V, usando um processo BiCMOS baseado em bipolar. As medições revelaram que ele opera até 340 Msps com fonte de alimentação de 1.26 V, consumindo 36 mW. A taxa de conversão por índice de desempenho de energia de 9.4 Msps/mW é a mais alta nos ADCs rápidos de 6 bits relatados até o momento. Para operar nesta baixa tensão de alimentação, foi desenvolvido um novo esquema de codificador, juntamente com um layout exclusivo, que também melhorou substancialmente a taxa de erro de faísca. Os circuitos do codificador foram sintetizados em uma nova topologia lógica que chamamos de “lógica dobrável”. Essa nova topologia lógica não é apenas adequada para operação em baixa tensão, mas também intrinsecamente rápida.
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Yuji GENDAI, "A 6-Bit 340 Msps BiCMOS ADC of 1.8 V Single Power Supply Adopting Folding Logic" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 8, pp. 1546-1553, August 2002, doi: .
Abstract: We have developed a 6-bit flash ADC powered from a single 1.8 V supply, using a bipolar based BiCMOS process. Measurements revealed that it operates up to 340 Msps at 1.26 V power supply consuming 36 mW. The conversion rate per power performance index of 9.4 Msps/mW is the highest in the fast 6-bit ADCs reported to date. To operate at this low supply voltage, a new encoder scheme, together with the unique layout, was devised which also substantially improved sparkle error rate. The encoder circuits was synthesized in a new logic topology that we named "folding logic. " This new logic topology is not only suitable for low-voltage operation but also intrinsically fast.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_8_1546/_p
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@ARTICLE{e85-c_8_1546,
author={Yuji GENDAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 6-Bit 340 Msps BiCMOS ADC of 1.8 V Single Power Supply Adopting Folding Logic},
year={2002},
volume={E85-C},
number={8},
pages={1546-1553},
abstract={We have developed a 6-bit flash ADC powered from a single 1.8 V supply, using a bipolar based BiCMOS process. Measurements revealed that it operates up to 340 Msps at 1.26 V power supply consuming 36 mW. The conversion rate per power performance index of 9.4 Msps/mW is the highest in the fast 6-bit ADCs reported to date. To operate at this low supply voltage, a new encoder scheme, together with the unique layout, was devised which also substantially improved sparkle error rate. The encoder circuits was synthesized in a new logic topology that we named "folding logic. " This new logic topology is not only suitable for low-voltage operation but also intrinsically fast.},
keywords={},
doi={},
ISSN={},
month={August},}
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TY - JOUR
TI - A 6-Bit 340 Msps BiCMOS ADC of 1.8 V Single Power Supply Adopting Folding Logic
T2 - IEICE TRANSACTIONS on Electronics
SP - 1546
EP - 1553
AU - Yuji GENDAI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2002
AB - We have developed a 6-bit flash ADC powered from a single 1.8 V supply, using a bipolar based BiCMOS process. Measurements revealed that it operates up to 340 Msps at 1.26 V power supply consuming 36 mW. The conversion rate per power performance index of 9.4 Msps/mW is the highest in the fast 6-bit ADCs reported to date. To operate at this low supply voltage, a new encoder scheme, together with the unique layout, was devised which also substantially improved sparkle error rate. The encoder circuits was synthesized in a new logic topology that we named "folding logic. " This new logic topology is not only suitable for low-voltage operation but also intrinsically fast.
ER -