The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo apresenta um front-end de receptor totalmente integrado, porém compacto, para aplicações Sub-GHz, como Internet das Coisas (IoT). A rede correspondente do amplificador de baixo ruído (LNA) aproveita uma técnica de aumento de indutância. Um indutor no chip relativamente pequeno com uma área compacta consegue o casamento de impedância em uma frequência tão baixa. Além disso, um modo mixer passivo ignora o LNA para estender a faixa dinâmica do receptor. O mixer passivo fornece correspondência com a interface da antena de 50Ω para eliminar a necessidade de componentes passivos adicionais. Portanto, o receptor pode ser totalmente integrado sem quaisquer componentes correspondentes fora do chip. A célula seguidora de tensão invertida (FVF) é adotada no filtro passa-baixa (LPF) e no amplificador de ganho variável (VGA) por sua alta linearidade e baixo consumo de energia. Fabricado em processo LP CMOS de 65 nm, o front-end do receptor proposto ocupa 0.37 mm2 área central, com uma potência de entrada tolerável variando de -91.5dBm a -1dBm para sinal GMSK de 500kbps na frequência de 924MHz. O consumo de energia é de 1mW com fonte de 1.2V.
Yuncheng ZHANG
Tokyo Institute of Technology
Bangan LIU
Tokyo Institute of Technology
Teruki SOMEYA
Tokyo Institute of Technology
Rui WU
Tokyo Institute of Technology
Junjun QIU
Tokyo Institute of Technology
Atsushi SHIRANE
Tokyo Institute of Technology
Kenichi OKADA
Tokyo Institute of Technology
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Yuncheng ZHANG, Bangan LIU, Teruki SOMEYA, Rui WU, Junjun QIU, Atsushi SHIRANE, Kenichi OKADA, "A 0.37mm2 Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components" in IEICE TRANSACTIONS on Electronics,
vol. E105-C, no. 7, pp. 334-342, July 2022, doi: 10.1587/transele.2021CDP0003.
Abstract: This paper presents a fully integrated yet compact receiver front-end for Sub-GHz applications such as Internet-of-Things (IoT). The low noise amplifier (LNA) matching network leverages an inductance boosting technique. A relatively small on-chip inductor with a compact area achieves impedance matching in such a low frequency. Moreover, a passive-mixer-first mode bypasses the LNA to extend the receiver dynamic-range. The passive mixer provides matching to the 50Ω antenna interface to eliminate the need for additional passive components. Therefore, the receiver can be fully-integrated without any off-chip matching components. The flipped-voltage-follower (FVF) cell is adopted in the low pass filter (LPF) and the variable gain amplifier (VGA) for its high linearity and low power consumption. Fabricated in 65nm LP CMOS process, the proposed receiver front-end occupies 0.37mm2 core area, with a tolerable input power ranging from -91.5dBm to -1dBm for 500kbps GMSK signal at 924MHz frequency. The power consumption is 1mW power under a 1.2V supply.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2021CDP0003/_p
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@ARTICLE{e105-c_7_334,
author={Yuncheng ZHANG, Bangan LIU, Teruki SOMEYA, Rui WU, Junjun QIU, Atsushi SHIRANE, Kenichi OKADA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 0.37mm2 Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components},
year={2022},
volume={E105-C},
number={7},
pages={334-342},
abstract={This paper presents a fully integrated yet compact receiver front-end for Sub-GHz applications such as Internet-of-Things (IoT). The low noise amplifier (LNA) matching network leverages an inductance boosting technique. A relatively small on-chip inductor with a compact area achieves impedance matching in such a low frequency. Moreover, a passive-mixer-first mode bypasses the LNA to extend the receiver dynamic-range. The passive mixer provides matching to the 50Ω antenna interface to eliminate the need for additional passive components. Therefore, the receiver can be fully-integrated without any off-chip matching components. The flipped-voltage-follower (FVF) cell is adopted in the low pass filter (LPF) and the variable gain amplifier (VGA) for its high linearity and low power consumption. Fabricated in 65nm LP CMOS process, the proposed receiver front-end occupies 0.37mm2 core area, with a tolerable input power ranging from -91.5dBm to -1dBm for 500kbps GMSK signal at 924MHz frequency. The power consumption is 1mW power under a 1.2V supply.},
keywords={},
doi={10.1587/transele.2021CDP0003},
ISSN={1745-1353},
month={July},}
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TY - JOUR
TI - A 0.37mm2 Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components
T2 - IEICE TRANSACTIONS on Electronics
SP - 334
EP - 342
AU - Yuncheng ZHANG
AU - Bangan LIU
AU - Teruki SOMEYA
AU - Rui WU
AU - Junjun QIU
AU - Atsushi SHIRANE
AU - Kenichi OKADA
PY - 2022
DO - 10.1587/transele.2021CDP0003
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E105-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2022
AB - This paper presents a fully integrated yet compact receiver front-end for Sub-GHz applications such as Internet-of-Things (IoT). The low noise amplifier (LNA) matching network leverages an inductance boosting technique. A relatively small on-chip inductor with a compact area achieves impedance matching in such a low frequency. Moreover, a passive-mixer-first mode bypasses the LNA to extend the receiver dynamic-range. The passive mixer provides matching to the 50Ω antenna interface to eliminate the need for additional passive components. Therefore, the receiver can be fully-integrated without any off-chip matching components. The flipped-voltage-follower (FVF) cell is adopted in the low pass filter (LPF) and the variable gain amplifier (VGA) for its high linearity and low power consumption. Fabricated in 65nm LP CMOS process, the proposed receiver front-end occupies 0.37mm2 core area, with a tolerable input power ranging from -91.5dBm to -1dBm for 500kbps GMSK signal at 924MHz frequency. The power consumption is 1mW power under a 1.2V supply.
ER -