The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
É apresentado um amplificador de potência (PA) linear e de banda larga para phased-array 5G. O projeto melhora a linearidade operando os transistores na região profunda da classe AB. O projeto amplia a largura de banda aplicando o transformador fracamente acoplado entre estágios. A teoria dos transformadores é ilustrada pela análise do modelo de modo ímpar e par. Com base nisso, o modo ímpar Q fator é usado para avaliar a qualidade do casamento de impedância. Transformadores fracamente e fortemente acoplados são comparados e analisados tanto no processo de projeto quanto nas características aplicáveis. Além disso, é proposto um método bem fundamentado para alcançar a transformação balanceada-desbalanceada baseada em transformador. O PA de dois estágios totalmente integrado foi projetado e implementado em um processo CMOS de 65 nm com uma fonte de alimentação de 1 V para fornecer um ganho máximo de sinal pequeno de 19dB. A potência máxima comprimida de 1 dB de saída (P1dB) de 17.4dBm e a potência de saída saturada (PSábado) de 18dBm são medidos em 28GHz. A eficiência de potência adicionada (PAE) do P1dB é 26.5%. De 23 a 32 GHz, o medido P1dB está acima de 16dBm, cobrindo as bandas 5G potenciais em todo o mundo em torno de 28GHz.
Chongyu YU
Southeast University
Jun FENG
Southeast University
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Chongyu YU, Jun FENG, "Analysis and Design of a Linear Ka-Band Power Amplifier in 65-nm CMOS for 5G Applications" in IEICE TRANSACTIONS on Electronics,
vol. E105-C, no. 5, pp. 184-193, May 2022, doi: 10.1587/transele.2021ECP5044.
Abstract: A linear and broadband power amplifier (PA) for 5G phased-array is presented. The design improves the linearity by operating the transistors in deep class AB region. The design broadens the bandwidth by applying the inter-stage weakly-coupled transformer. The theory of transformers is illustrated by analyzing the odd- and even-mode model. Based on this, the odd-mode Q factor is used to evaluate the quality of impedance matching. Weakly- and strongly-coupled transformers are compared and analyzed in both the design process and applicable characteristics. Besides, a well-founded method to achieve the transformer-based balanced-unbalanced transformation is proposed. The fully integrated two-stage PA is designed and implemented in a 65-nm CMOS process with a 1-V power supply to provide a maximum small-signal gain of 19dB. The maximum output 1-dB compressed power (P1dB) of 17.4dBm and the saturated output power (PSAT) of 18dBm are measured at 28GHz. The power-added efficiency (PAE) of the P1dB is 26.5%. From 23 to 32GHz, the measured P1dB is above 16dBm, covering the potential 5G bands worldwide around 28GHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2021ECP5044/_p
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@ARTICLE{e105-c_5_184,
author={Chongyu YU, Jun FENG, },
journal={IEICE TRANSACTIONS on Electronics},
title={Analysis and Design of a Linear Ka-Band Power Amplifier in 65-nm CMOS for 5G Applications},
year={2022},
volume={E105-C},
number={5},
pages={184-193},
abstract={A linear and broadband power amplifier (PA) for 5G phased-array is presented. The design improves the linearity by operating the transistors in deep class AB region. The design broadens the bandwidth by applying the inter-stage weakly-coupled transformer. The theory of transformers is illustrated by analyzing the odd- and even-mode model. Based on this, the odd-mode Q factor is used to evaluate the quality of impedance matching. Weakly- and strongly-coupled transformers are compared and analyzed in both the design process and applicable characteristics. Besides, a well-founded method to achieve the transformer-based balanced-unbalanced transformation is proposed. The fully integrated two-stage PA is designed and implemented in a 65-nm CMOS process with a 1-V power supply to provide a maximum small-signal gain of 19dB. The maximum output 1-dB compressed power (P1dB) of 17.4dBm and the saturated output power (PSAT) of 18dBm are measured at 28GHz. The power-added efficiency (PAE) of the P1dB is 26.5%. From 23 to 32GHz, the measured P1dB is above 16dBm, covering the potential 5G bands worldwide around 28GHz.},
keywords={},
doi={10.1587/transele.2021ECP5044},
ISSN={1745-1353},
month={May},}
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TY - JOUR
TI - Analysis and Design of a Linear Ka-Band Power Amplifier in 65-nm CMOS for 5G Applications
T2 - IEICE TRANSACTIONS on Electronics
SP - 184
EP - 193
AU - Chongyu YU
AU - Jun FENG
PY - 2022
DO - 10.1587/transele.2021ECP5044
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E105-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2022
AB - A linear and broadband power amplifier (PA) for 5G phased-array is presented. The design improves the linearity by operating the transistors in deep class AB region. The design broadens the bandwidth by applying the inter-stage weakly-coupled transformer. The theory of transformers is illustrated by analyzing the odd- and even-mode model. Based on this, the odd-mode Q factor is used to evaluate the quality of impedance matching. Weakly- and strongly-coupled transformers are compared and analyzed in both the design process and applicable characteristics. Besides, a well-founded method to achieve the transformer-based balanced-unbalanced transformation is proposed. The fully integrated two-stage PA is designed and implemented in a 65-nm CMOS process with a 1-V power supply to provide a maximum small-signal gain of 19dB. The maximum output 1-dB compressed power (P1dB) of 17.4dBm and the saturated output power (PSAT) of 18dBm are measured at 28GHz. The power-added efficiency (PAE) of the P1dB is 26.5%. From 23 to 32GHz, the measured P1dB is above 16dBm, covering the potential 5G bands worldwide around 28GHz.
ER -