The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Uma ferramenta de análise de temporização estática (STA) para um FPGA de comutador de átomo de 28 nm (AS-FPGA) é introduzida para validar o atraso do sinal de um circuito de aplicação antes da implementação. A alta precisão da ferramenta STA é confirmada pela implementação de um circuito de aplicação prático no AS-FPGA de 28nm. Além disso, uma melhoria dramática de atraso e potência é demonstrada em comparação com um AS-FPGA de 40nm anterior.
Xu BAI
NanoBridge Semiconductor, Inc.
Ryusuke NEBASHI
NanoBridge Semiconductor, Inc.
Makoto MIYAMURA
NanoBridge Semiconductor, Inc.
Kazunori FUNAHASHI
NanoBridge Semiconductor, Inc.
Naoki BANNO
NanoBridge Semiconductor, Inc.
Koichiro OKAMOTO
NanoBridge Semiconductor, Inc.
Hideaki NUMATA
NanoBridge Semiconductor, Inc.
Noriyuki IGUCHI
NanoBridge Semiconductor, Inc.
Tadahiko SUGIBAYASHI
NanoBridge Semiconductor, Inc.
Toshitsugu SAKAMOTO
NanoBridge Semiconductor, Inc.
Munehiro TADA
NanoBridge Semiconductor, Inc.
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Copiar
Xu BAI, Ryusuke NEBASHI, Makoto MIYAMURA, Kazunori FUNAHASHI, Naoki BANNO, Koichiro OKAMOTO, Hideaki NUMATA, Noriyuki IGUCHI, Tadahiko SUGIBAYASHI, Toshitsugu SAKAMOTO, Munehiro TADA, "28nm Atom-Switch FPGA: Static Timing Analysis and Evaluation" in IEICE TRANSACTIONS on Electronics,
vol. E105-C, no. 10, pp. 627-630, October 2022, doi: 10.1587/transele.2021FUS0005.
Abstract: A static timing analysis (STA) tool for a 28nm atom-switch FPGA (AS-FPGA) is introduced to validate the signal delay of an application circuit before implementation. High accuracy of the STA tool is confirmed by implementing a practical application circuit on the 28nm AS-FPGA. Moreover, dramatic improvement of delay and power is demonstrated in comparison with a previous 40nm AS-FPGA.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2021FUS0005/_p
Copiar
@ARTICLE{e105-c_10_627,
author={Xu BAI, Ryusuke NEBASHI, Makoto MIYAMURA, Kazunori FUNAHASHI, Naoki BANNO, Koichiro OKAMOTO, Hideaki NUMATA, Noriyuki IGUCHI, Tadahiko SUGIBAYASHI, Toshitsugu SAKAMOTO, Munehiro TADA, },
journal={IEICE TRANSACTIONS on Electronics},
title={28nm Atom-Switch FPGA: Static Timing Analysis and Evaluation},
year={2022},
volume={E105-C},
number={10},
pages={627-630},
abstract={A static timing analysis (STA) tool for a 28nm atom-switch FPGA (AS-FPGA) is introduced to validate the signal delay of an application circuit before implementation. High accuracy of the STA tool is confirmed by implementing a practical application circuit on the 28nm AS-FPGA. Moreover, dramatic improvement of delay and power is demonstrated in comparison with a previous 40nm AS-FPGA.},
keywords={},
doi={10.1587/transele.2021FUS0005},
ISSN={1745-1353},
month={October},}
Copiar
TY - JOUR
TI - 28nm Atom-Switch FPGA: Static Timing Analysis and Evaluation
T2 - IEICE TRANSACTIONS on Electronics
SP - 627
EP - 630
AU - Xu BAI
AU - Ryusuke NEBASHI
AU - Makoto MIYAMURA
AU - Kazunori FUNAHASHI
AU - Naoki BANNO
AU - Koichiro OKAMOTO
AU - Hideaki NUMATA
AU - Noriyuki IGUCHI
AU - Tadahiko SUGIBAYASHI
AU - Toshitsugu SAKAMOTO
AU - Munehiro TADA
PY - 2022
DO - 10.1587/transele.2021FUS0005
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E105-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2022
AB - A static timing analysis (STA) tool for a 28nm atom-switch FPGA (AS-FPGA) is introduced to validate the signal delay of an application circuit before implementation. High accuracy of the STA tool is confirmed by implementing a practical application circuit on the 28nm AS-FPGA. Moreover, dramatic improvement of delay and power is demonstrated in comparison with a previous 40nm AS-FPGA.
ER -