The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
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Este artigo descreve os fatores limitantes de eficiência resultantes da fonte de corrente do transistor no caso da classe F e classe F inversa (F-1) operações em região saturada. Nós investigamos a influência dos comportamentos de tensão de joelho e de corte de tensão de porta na eficiência do dreno como fatores limitantes para a fonte de corrente. Foi realizada análise numérica utilizando um modelo de transistor simplificado. Como resultado, demonstramos que o fator limitante para a classe F-1 a operação é a condução do diodo de porta em vez da tensão de joelho. Por outro lado, o PA classe F é restringido pelos efeitos da tensão do joelho. Além disso, medições não lineares realizadas em um GaN HEMT validam nossos resultados analíticos.
Hiroshi YAMAMOTO
Sumitomo Electric Industries, Ltd.
Ken KIKUCHI
Sumitomo Electric Industries, Ltd.
Valeria VADALÀ
University of Ferrara
Gianni BOSI
University of Ferrara
Antonio RAFFO
University of Ferrara
Giorgio VANNINI
University of Ferrara
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Hiroshi YAMAMOTO, Ken KIKUCHI, Valeria VADALÀ, Gianni BOSI, Antonio RAFFO, Giorgio VANNINI, "Analysis of Efficiency-Limiting Factors Resulting from Transistor Current Source on Class-F and Inverse Class-F Power Amplifiers" in IEICE TRANSACTIONS on Electronics,
vol. E105-C, no. 10, pp. 449-456, October 2022, doi: 10.1587/transele.2022MMI0003.
Abstract: This paper describes the efficiency-limiting factors resulting from transistor current source in the case of class-F and inverse class-F (F-1) operations under saturated region. We investigated the influence of knee voltage and gate-voltage clipping behaviors on drain efficiency as limiting factors for the current source. Numerical analysis using a simplified transistor model was carried out. As a result, we have demonstrated that the limiting factor for class-F-1 operation is the gate-diode conduction rather than knee voltage. On the other hand, class-F PA is restricted by the knee voltage effects. Furthermore, nonlinear measurements carried out on a GaN HEMT validate our analytical results.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2022MMI0003/_p
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@ARTICLE{e105-c_10_449,
author={Hiroshi YAMAMOTO, Ken KIKUCHI, Valeria VADALÀ, Gianni BOSI, Antonio RAFFO, Giorgio VANNINI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Analysis of Efficiency-Limiting Factors Resulting from Transistor Current Source on Class-F and Inverse Class-F Power Amplifiers},
year={2022},
volume={E105-C},
number={10},
pages={449-456},
abstract={This paper describes the efficiency-limiting factors resulting from transistor current source in the case of class-F and inverse class-F (F-1) operations under saturated region. We investigated the influence of knee voltage and gate-voltage clipping behaviors on drain efficiency as limiting factors for the current source. Numerical analysis using a simplified transistor model was carried out. As a result, we have demonstrated that the limiting factor for class-F-1 operation is the gate-diode conduction rather than knee voltage. On the other hand, class-F PA is restricted by the knee voltage effects. Furthermore, nonlinear measurements carried out on a GaN HEMT validate our analytical results.},
keywords={},
doi={10.1587/transele.2022MMI0003},
ISSN={1745-1353},
month={October},}
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TY - JOUR
TI - Analysis of Efficiency-Limiting Factors Resulting from Transistor Current Source on Class-F and Inverse Class-F Power Amplifiers
T2 - IEICE TRANSACTIONS on Electronics
SP - 449
EP - 456
AU - Hiroshi YAMAMOTO
AU - Ken KIKUCHI
AU - Valeria VADALÀ
AU - Gianni BOSI
AU - Antonio RAFFO
AU - Giorgio VANNINI
PY - 2022
DO - 10.1587/transele.2022MMI0003
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E105-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2022
AB - This paper describes the efficiency-limiting factors resulting from transistor current source in the case of class-F and inverse class-F (F-1) operations under saturated region. We investigated the influence of knee voltage and gate-voltage clipping behaviors on drain efficiency as limiting factors for the current source. Numerical analysis using a simplified transistor model was carried out. As a result, we have demonstrated that the limiting factor for class-F-1 operation is the gate-diode conduction rather than knee voltage. On the other hand, class-F PA is restricted by the knee voltage effects. Furthermore, nonlinear measurements carried out on a GaN HEMT validate our analytical results.
ER -