The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Transistores de película fina (TFT) de silício policristalino (poli-Si) projetados assimetricamente foram fabricados e investigados para suprimir o efeito de torção e melhorar a confiabilidade elétrica. TFT poli-Si de comprimento de canal duplo assimétrico (ADCL) mostra a melhor redução de torções e correntes de fuga. A simulação de projeto auxiliada por computador prova que ADCL pode induzir adequadamente alta tensão no nó flutuante do TFT em alta tensão de fonte de dreno (VDS), o que pode mitigar o impacto da ionização e a degradação da transcondutância do TFT apresentando alta confiabilidade sob o estresse do portador quente.
Joonghyun PARK
Sungkyunkwan University
Myunghun SHIN
Korea Aerospace University
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Joonghyun PARK, Myunghun SHIN, "Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress" in IEICE TRANSACTIONS on Electronics,
vol. E102-C, no. 1, pp. 95-98, January 2019, doi: 10.1587/transele.E102.C.95.
Abstract: Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E102.C.95/_p
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@ARTICLE{e102-c_1_95,
author={Joonghyun PARK, Myunghun SHIN, },
journal={IEICE TRANSACTIONS on Electronics},
title={Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress},
year={2019},
volume={E102-C},
number={1},
pages={95-98},
abstract={Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.},
keywords={},
doi={10.1587/transele.E102.C.95},
ISSN={1745-1353},
month={January},}
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TY - JOUR
TI - Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress
T2 - IEICE TRANSACTIONS on Electronics
SP - 95
EP - 98
AU - Joonghyun PARK
AU - Myunghun SHIN
PY - 2019
DO - 10.1587/transele.E102.C.95
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E102-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2019
AB - Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.
ER -