The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Um método flexível de remoção de ruído para medições de microondas em wafer de MOSFETs de silício é apresentado neste estudo. Usamos as estruturas fictícias abertas, curtas e passantes para subtrair os efeitos parasitas das almofadas de sonda e interconexões de um transistor MOS fixo. O padrão thru é usado para extrair os parâmetros de interconexão para subtrair os parasitas de interconexão nos terminais de porta, dreno e fonte do MOSFET. Os parasitas da perna pendente no terminal de origem também são modelados e levados em consideração no procedimento de remoção de ruído. Os transistores MOS e estruturas fictícias de desincorporação foram fabricados em um processo CMOS padrão e caracterizados até 20 GHz. Comparada com os métodos convencionais de desincorporação, a técnica proposta é precisa e eficiente em área.
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Yueh-Hua WANG, Ming-Hsiang CHO, Lin-Kun WU, "A Flexible Microwave De-Embedding Method for On-Wafer Noise Parameter Characterization of MOSFETs" in IEICE TRANSACTIONS on Electronics,
vol. E92-C, no. 9, pp. 1157-1162, September 2009, doi: 10.1587/transele.E92.C.1157.
Abstract: A flexible noise de-embedding method for on-wafer microwave measurements of silicon MOSFETs is presented in this study. We use the open, short, and thru dummy structures to subtract the parasitic effects from the probe pads and interconnects of a fixtured MOS transistor. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate, drain, and source terminals of the MOSFET. The parasitics of the dangling leg in the source terminal are also modeled and taken into account in the noise de-embedding procedure. The MOS transistors and de-embedding dummy structures were fabricated in a standard CMOS process and characterized up to 20 GHz. Compared with the conventional de-embedding methods, the proposed technique is accurate and area-efficient.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.1157/_p
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@ARTICLE{e92-c_9_1157,
author={Yueh-Hua WANG, Ming-Hsiang CHO, Lin-Kun WU, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Flexible Microwave De-Embedding Method for On-Wafer Noise Parameter Characterization of MOSFETs},
year={2009},
volume={E92-C},
number={9},
pages={1157-1162},
abstract={A flexible noise de-embedding method for on-wafer microwave measurements of silicon MOSFETs is presented in this study. We use the open, short, and thru dummy structures to subtract the parasitic effects from the probe pads and interconnects of a fixtured MOS transistor. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate, drain, and source terminals of the MOSFET. The parasitics of the dangling leg in the source terminal are also modeled and taken into account in the noise de-embedding procedure. The MOS transistors and de-embedding dummy structures were fabricated in a standard CMOS process and characterized up to 20 GHz. Compared with the conventional de-embedding methods, the proposed technique is accurate and area-efficient.},
keywords={},
doi={10.1587/transele.E92.C.1157},
ISSN={1745-1353},
month={September},}
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TY - JOUR
TI - A Flexible Microwave De-Embedding Method for On-Wafer Noise Parameter Characterization of MOSFETs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1157
EP - 1162
AU - Yueh-Hua WANG
AU - Ming-Hsiang CHO
AU - Lin-Kun WU
PY - 2009
DO - 10.1587/transele.E92.C.1157
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 2009
AB - A flexible noise de-embedding method for on-wafer microwave measurements of silicon MOSFETs is presented in this study. We use the open, short, and thru dummy structures to subtract the parasitic effects from the probe pads and interconnects of a fixtured MOS transistor. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate, drain, and source terminals of the MOSFET. The parasitics of the dangling leg in the source terminal are also modeled and taken into account in the noise de-embedding procedure. The MOS transistors and de-embedding dummy structures were fabricated in a standard CMOS process and characterized up to 20 GHz. Compared with the conventional de-embedding methods, the proposed technique is accurate and area-efficient.
ER -