The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Com a redução dos dispositivos CMOS, a variação do processo está se tornando a principal causa de falhas em circuitos analógicos baseados em CMOS. Por exemplo, uma variação de apenas 5% no tamanho do recurso pode provocar falha no circuito. Vários métodos, como Monte-Carlo e verificação baseada em cantos, ajudam a prever a variação causada por problemas às custas de milhares de simulações antes de capturar o problema. Este artigo apresenta uma nova metodologia para previsão de desempenho de circuitos analógicos. O novo método aplica primeiro a análise estatística de incerteza em todos os dispositivos associados no circuito. Ao avaliar a importância da incerteza da variabilidade dos parâmetros, ele aproxima o circuito apenas com os componentes que são mais críticos para os resultados de saída. A aplicação da Aritmética Afim de Chebyshev (CAA) no sistema resultante fornece limites de desempenho e informações de probabilidade no domínio do tempo e no domínio da frequência.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copiar
Jin SUN, Kiran POTLURI, Janet M. WANG, "Predicting Analog Circuit Performance Based on Importance of Uncertainties" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 6, pp. 893-904, June 2010, doi: 10.1587/transele.E93.C.893.
Abstract: With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.893/_p
Copiar
@ARTICLE{e93-c_6_893,
author={Jin SUN, Kiran POTLURI, Janet M. WANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={Predicting Analog Circuit Performance Based on Importance of Uncertainties},
year={2010},
volume={E93-C},
number={6},
pages={893-904},
abstract={With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.},
keywords={},
doi={10.1587/transele.E93.C.893},
ISSN={1745-1353},
month={June},}
Copiar
TY - JOUR
TI - Predicting Analog Circuit Performance Based on Importance of Uncertainties
T2 - IEICE TRANSACTIONS on Electronics
SP - 893
EP - 904
AU - Jin SUN
AU - Kiran POTLURI
AU - Janet M. WANG
PY - 2010
DO - 10.1587/transele.E93.C.893
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2010
AB - With the scaling down of CMOS devices, process variation is becoming the leading cause of CMOS based analog circuit failures. For example, a mere 5% variation in feature size can trigger circuit failure. Various methods such as Monte-Carlo and corner-based verification help predict variation caused problems at the expense of thousands of simulations before capturing the problem. This paper presents a new methodology for analog circuit performance prediction. The new method first applies statistical uncertainty analysis on all associated devices in the circuit. By evaluating the uncertainty importance of parameter variability, it approximates the circuit with only components that are most critical to output results. Applying Chebyshev Affine Arithmetic (CAA) on the resulting system provides both performance bounds and probability information in time domain and frequency domain.
ER -