The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Defeitos físicos que não são cobertos por falha presa ou modelo de falha em ponte estão aumentando em circuitos LSI projetados e fabricados em modernas tecnologias Deep Sub-Micron (DSM). Portanto, é necessário visar falhas não travadas e sem ponte. Um preso aberto é um modelo de falha que captura defeitos no nível do transistor. Este artigo apresenta dois métodos para maximizar a cobertura de faltas emperradas usando vetores de teste emperrados. Neste artigo, assumimos que é fornecido um conjunto de testes para detectar falhas travadas e consideramos duas formulações para maximizar a cobertura de travamento aberto usando o conjunto de testes fornecido, como segue. O primeiro problema é formar uma sequência de teste usando cada vetor de teste múltiplas vezes, se necessário, desde que a cobertura emperrada seja aumentada. Neste caso, o objetivo é tornar a sequência de testes resultante tão curta quanto possível, sob a restrição de que a cobertura máxima emperrada seja alcançada usando o conjunto de testes fornecido. O segundo problema é formar uma sequência de teste usando cada vetor de teste exatamente uma vez. Assim, neste caso, o comprimento da sequência de teste é mantido como o número de determinados vetores de teste. Em ambas as formulações a cobertura de faltas estagnadas não muda. A eficácia dos métodos propostos é estabelecida por resultados experimentais para circuitos de referência.
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Yoshinobu HIGAMI, Kewal K. SALUJA, Hiroshi TAKAHASHI, Shin-ya KOBAYASHI, Yuzo TAKAMATSU, "Maximizing Stuck-Open Fault Coverage Using Stuck-at Test Vectors" in IEICE TRANSACTIONS on Fundamentals,
vol. E91-A, no. 12, pp. 3506-3513, December 2008, doi: 10.1093/ietfec/e91-a.12.3506.
Abstract: Physical defects that are not covered by stuck-at fault or bridging fault model are increasing in LSI circuits designed and manufactured in modern Deep Sub-Micron (DSM) technologies. Therefore, it is necessary to target non-stuck-at and non-bridging faults. A stuck-open is one such fault model that captures transistor level defects. This paper presents two methods for maximizing stuck-open fault coverage using stuck-at test vectors. In this paper we assume that a test set to detect stuck-at faults is given and we consider two formulations for maximizing stuck-open coverage using the given test set as follows. The first problem is to form a test sequence by using each test vector multiple times, if needed, as long as the stuck-open coverage is increased. In this case the target is to make the resultant test sequence as short as possible under the constraint that the maximum stuck-open coverage is achieved using the given test set. The second problem is to form a test sequence by using each test vector exactly once only. Thus in this case the length of the test sequence is maintained as the number of given test vectors. In both formulations the stuck-at fault coverage does not change. The effectiveness of the proposed methods is established by experimental results for benchmark circuits.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e91-a.12.3506/_p
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@ARTICLE{e91-a_12_3506,
author={Yoshinobu HIGAMI, Kewal K. SALUJA, Hiroshi TAKAHASHI, Shin-ya KOBAYASHI, Yuzo TAKAMATSU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Maximizing Stuck-Open Fault Coverage Using Stuck-at Test Vectors},
year={2008},
volume={E91-A},
number={12},
pages={3506-3513},
abstract={Physical defects that are not covered by stuck-at fault or bridging fault model are increasing in LSI circuits designed and manufactured in modern Deep Sub-Micron (DSM) technologies. Therefore, it is necessary to target non-stuck-at and non-bridging faults. A stuck-open is one such fault model that captures transistor level defects. This paper presents two methods for maximizing stuck-open fault coverage using stuck-at test vectors. In this paper we assume that a test set to detect stuck-at faults is given and we consider two formulations for maximizing stuck-open coverage using the given test set as follows. The first problem is to form a test sequence by using each test vector multiple times, if needed, as long as the stuck-open coverage is increased. In this case the target is to make the resultant test sequence as short as possible under the constraint that the maximum stuck-open coverage is achieved using the given test set. The second problem is to form a test sequence by using each test vector exactly once only. Thus in this case the length of the test sequence is maintained as the number of given test vectors. In both formulations the stuck-at fault coverage does not change. The effectiveness of the proposed methods is established by experimental results for benchmark circuits.},
keywords={},
doi={10.1093/ietfec/e91-a.12.3506},
ISSN={1745-1337},
month={December},}
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TY - JOUR
TI - Maximizing Stuck-Open Fault Coverage Using Stuck-at Test Vectors
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3506
EP - 3513
AU - Yoshinobu HIGAMI
AU - Kewal K. SALUJA
AU - Hiroshi TAKAHASHI
AU - Shin-ya KOBAYASHI
AU - Yuzo TAKAMATSU
PY - 2008
DO - 10.1093/ietfec/e91-a.12.3506
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E91-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2008
AB - Physical defects that are not covered by stuck-at fault or bridging fault model are increasing in LSI circuits designed and manufactured in modern Deep Sub-Micron (DSM) technologies. Therefore, it is necessary to target non-stuck-at and non-bridging faults. A stuck-open is one such fault model that captures transistor level defects. This paper presents two methods for maximizing stuck-open fault coverage using stuck-at test vectors. In this paper we assume that a test set to detect stuck-at faults is given and we consider two formulations for maximizing stuck-open coverage using the given test set as follows. The first problem is to form a test sequence by using each test vector multiple times, if needed, as long as the stuck-open coverage is increased. In this case the target is to make the resultant test sequence as short as possible under the constraint that the maximum stuck-open coverage is achieved using the given test set. The second problem is to form a test sequence by using each test vector exactly once only. Thus in this case the length of the test sequence is maintained as the number of given test vectors. In both formulations the stuck-at fault coverage does not change. The effectiveness of the proposed methods is established by experimental results for benchmark circuits.
ER -