The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Reduzir o tamanho do código é crucial em sistemas embarcados, bem como em sistemas de alto desempenho para superar o gargalo de comunicação entre memória e CPU, especialmente com processadores VLIW (Very Long Instruction Word) que requerem pré-busca de instruções de alta largura de banda. Este artigo apresenta uma nova abordagem para compressão de código baseada em dicionário em sistemas baseados em processadores VLIW usando isomorfismo entre palavras de instrução. Após dividirmos as palavras de instrução em dois grupos, um para o grupo de opcode e outro para o grupo de operandos, o algoritmo de compressão proposto é aplicado a cada grupo para compressão máxima de código. Palavras de instrução usadas com frequência são extraídas do código original para serem mapeadas em dois dicionários, um dicionário de código de operação e um dicionário de operandos. De acordo com os benchmarks SPEC95, a técnica proposta alcançou uma taxa média de compactação de código de 63%, 69% e 71% em uma arquitetura VLIW de 4, 8 e 12 edições, respectivamente.
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Sang-Joon NAM, In-Cheol PARK, Chong-Min KYUNG, "Improving Dictionary-Based Code Compression in VLIW Architectures" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 11, pp. 2318-2324, November 1999, doi: .
Abstract: Reducing code size is crucial in embedded systems as well as in high-performance systems to overcome the communication bottleneck between memory and CPU, especially with VLIW (Very Long Instruction Word) processors that require a high-bandwidth instruction prefetching. This paper presents a new approach for dictionary-based code compression in VLIW processor-based systems using isomorphism among instruction words. After we divide instruction words into two groups, one for opcode group and the other for operand group, the proposed compression algorithm is applied to each group for maximal code compression. Frequently-used instruction words are extracted from the original code to be mapped into two dictionaries, an opcode dictionary and an operand dictionary. According to the SPEC95 benchmarks, the proposed technique has achieved an average code compression ratio of 63%, 69%, and 71% in a 4-issue, 8-issue, and 12-issue VLIW architecture, respectively.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_11_2318/_p
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@ARTICLE{e82-a_11_2318,
author={Sang-Joon NAM, In-Cheol PARK, Chong-Min KYUNG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Improving Dictionary-Based Code Compression in VLIW Architectures},
year={1999},
volume={E82-A},
number={11},
pages={2318-2324},
abstract={Reducing code size is crucial in embedded systems as well as in high-performance systems to overcome the communication bottleneck between memory and CPU, especially with VLIW (Very Long Instruction Word) processors that require a high-bandwidth instruction prefetching. This paper presents a new approach for dictionary-based code compression in VLIW processor-based systems using isomorphism among instruction words. After we divide instruction words into two groups, one for opcode group and the other for operand group, the proposed compression algorithm is applied to each group for maximal code compression. Frequently-used instruction words are extracted from the original code to be mapped into two dictionaries, an opcode dictionary and an operand dictionary. According to the SPEC95 benchmarks, the proposed technique has achieved an average code compression ratio of 63%, 69%, and 71% in a 4-issue, 8-issue, and 12-issue VLIW architecture, respectively.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - Improving Dictionary-Based Code Compression in VLIW Architectures
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2318
EP - 2324
AU - Sang-Joon NAM
AU - In-Cheol PARK
AU - Chong-Min KYUNG
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 1999
AB - Reducing code size is crucial in embedded systems as well as in high-performance systems to overcome the communication bottleneck between memory and CPU, especially with VLIW (Very Long Instruction Word) processors that require a high-bandwidth instruction prefetching. This paper presents a new approach for dictionary-based code compression in VLIW processor-based systems using isomorphism among instruction words. After we divide instruction words into two groups, one for opcode group and the other for operand group, the proposed compression algorithm is applied to each group for maximal code compression. Frequently-used instruction words are extracted from the original code to be mapped into two dictionaries, an opcode dictionary and an operand dictionary. According to the SPEC95 benchmarks, the proposed technique has achieved an average code compression ratio of 63%, 69%, and 71% in a 4-issue, 8-issue, and 12-issue VLIW architecture, respectively.
ER -