The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Devido ao grande número de E/S em um pacote Ball-Grid-Array (BGA), o roteamento se torna um trabalho cada vez mais importante. Um roteador baseado em anel para o pacote BGA é apresentado neste artigo para interconectar cada bloco de E/S de um chip a uma bola correspondente distribuída na área do substrato. As principais fases do roteador consistem em atribuição de camada, roteamento topológico e roteamento físico. Usando este roteador, podemos gerar uma distribuição uniforme de fios planos e de qualquer ângulo para melhorar o rendimento de fabricação. Também conduzimos vários exemplos de testes para verificar a eficiência deste roteador. Experimentos mostram que o roteador produz resultados muito bons, muito melhores que o projeto manual, podendo ser aplicado no empacotamento prático de circuitos integrados.
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Shuenn-Shi CHEN, Jong-Jang CHEN, Trong-Yen LEE, Chia-Chun TSAI, Sao-Jie CHEN, "A New Approach to the Ball Grid Array Package Routing" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 11, pp. 2599-2608, November 1999, doi: .
Abstract: Due to the large number of I/O's in a Ball-Grid-Array (BGA) package, routing becomes more and more an important work. A ring-based router for the BGA package is presented in this paper to interconnect each I/O pad of a chip to a corresponding ball distributed on the substrate area. The major phases for the router consist of layer assignment, topological routing, and physical routing. Using this router, we can generate an even distribution of planar and any-angle wires to improve manufacturing yield. We have also conducted various testing examples to verify the efficiency of this router. Experiments show that the router produces very good results, far better than the manual design, thus it can be applied to the practical packaging of integrated circuits.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_11_2599/_p
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@ARTICLE{e82-a_11_2599,
author={Shuenn-Shi CHEN, Jong-Jang CHEN, Trong-Yen LEE, Chia-Chun TSAI, Sao-Jie CHEN, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A New Approach to the Ball Grid Array Package Routing},
year={1999},
volume={E82-A},
number={11},
pages={2599-2608},
abstract={Due to the large number of I/O's in a Ball-Grid-Array (BGA) package, routing becomes more and more an important work. A ring-based router for the BGA package is presented in this paper to interconnect each I/O pad of a chip to a corresponding ball distributed on the substrate area. The major phases for the router consist of layer assignment, topological routing, and physical routing. Using this router, we can generate an even distribution of planar and any-angle wires to improve manufacturing yield. We have also conducted various testing examples to verify the efficiency of this router. Experiments show that the router produces very good results, far better than the manual design, thus it can be applied to the practical packaging of integrated circuits.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - A New Approach to the Ball Grid Array Package Routing
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2599
EP - 2608
AU - Shuenn-Shi CHEN
AU - Jong-Jang CHEN
AU - Trong-Yen LEE
AU - Chia-Chun TSAI
AU - Sao-Jie CHEN
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 1999
AB - Due to the large number of I/O's in a Ball-Grid-Array (BGA) package, routing becomes more and more an important work. A ring-based router for the BGA package is presented in this paper to interconnect each I/O pad of a chip to a corresponding ball distributed on the substrate area. The major phases for the router consist of layer assignment, topological routing, and physical routing. Using this router, we can generate an even distribution of planar and any-angle wires to improve manufacturing yield. We have also conducted various testing examples to verify the efficiency of this router. Experiments show that the router produces very good results, far better than the manual design, thus it can be applied to the practical packaging of integrated circuits.
ER -