The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Uma configuração de layout de célula padrão analógico é proposta para simplificar o projeto e reduzir as horas de trabalho para projetar LSIs mistos analógico-digitais, e células padrão analógicas são fabricadas para conversores AD e DA com moduladores Δ-Σ. Este trabalho busca implementar o posicionamento de células 2-D com rotação de espelho de cima para baixo e esquerda-direita e fiação analógica de alta impedância mais curta do que o posicionamento 1-D convencional, a fim de obter características analógicas de alto desempenho. Considerando a sensibilidade ao ruído, os canais de roteamento foram classificados em 4 tipos: analógico de alta impedância, analógico de baixa impedância, analógico-digital e digital, e esforços foram feitos para evitar que fios analógicos cruzassem fios digitais. Além dos fios de aterramento analógicos e de energia, as células padrão analógicas possuem fios de aterramento analógicos integrados com poços conectados otimizados para blindagem. Esses fios são interligados a uma nova célula de isolamento que separa os circuitos analógicos dos circuitos digitais e canais de roteamento. Com base na estrutura de layout acima, foram projetados 46 tipos diferentes de células padrão analógicas. Além disso, a parte analógica dos conversores AD e DA do tipo Δ-Σ pode ser projetada automaticamente em conjunto com processamento interativo e chips fabricados usando essas células. Verificou-se que, em comparação com o projeto manual, seria possível obter facilmente um chip ocupando menos de 1.5 vezes a área com cerca de 2/3 dos dias-homem usando esta abordagem. Em comparação com o design manual, constatou-se também que o S / N a relação pode ser reduzida de cerca de 6 para 7 dB.
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Takao KANEKO, "Analog Standard Cells for A-D and D-A Converters with Δ-Σ Modulators" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 2, pp. 252-260, February 2000, doi: .
Abstract: An analog standard cell layout configuration is proposed for simplifying the design and reducing the man-hours for designing mixed analog-digital LSIs, and analog standard cells are fabricated for A-D and D-A converters with Δ-Σ modulators. This works seeks to implement 2-D cell placement with up-down and left-right mirror rotation and shorter high-impedance analog wiring than conventional 1-D placement in order to obtain high-performance analog characteristics. By considering sensitivity to noise, routing channels have been classified into 4 types: high-impedance analog, low-impedance analog, analog-digital, and digital, and efforts have been made to prevent analog wires from crossing over digital wires. In addition to power and analog ground wires, analog standard cells have built-in analog ground wires with attached wells optimized for shielding. These wires are interconnected to a new isolation cell that separates analog circuits from digital circuits and routing channels. Based on the above layout structure, 46 different types of analog standard cells have been designed. Also, the analog part of Δ-Σ type A-D and D-A converters can be automatically designed in conjunction with interactive processing and chips fabricated by using these cells. It was found that, compared to manual design, one could easily obtain a chip occupying less than 1.5-times the area with about 2/3 the man-days using this approach. In comparison with manual design, it was also found that the S/N ratio could be reduced from about 6 to 7 dB.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_2_252/_p
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@ARTICLE{e83-a_2_252,
author={Takao KANEKO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Analog Standard Cells for A-D and D-A Converters with Δ-Σ Modulators},
year={2000},
volume={E83-A},
number={2},
pages={252-260},
abstract={An analog standard cell layout configuration is proposed for simplifying the design and reducing the man-hours for designing mixed analog-digital LSIs, and analog standard cells are fabricated for A-D and D-A converters with Δ-Σ modulators. This works seeks to implement 2-D cell placement with up-down and left-right mirror rotation and shorter high-impedance analog wiring than conventional 1-D placement in order to obtain high-performance analog characteristics. By considering sensitivity to noise, routing channels have been classified into 4 types: high-impedance analog, low-impedance analog, analog-digital, and digital, and efforts have been made to prevent analog wires from crossing over digital wires. In addition to power and analog ground wires, analog standard cells have built-in analog ground wires with attached wells optimized for shielding. These wires are interconnected to a new isolation cell that separates analog circuits from digital circuits and routing channels. Based on the above layout structure, 46 different types of analog standard cells have been designed. Also, the analog part of Δ-Σ type A-D and D-A converters can be automatically designed in conjunction with interactive processing and chips fabricated by using these cells. It was found that, compared to manual design, one could easily obtain a chip occupying less than 1.5-times the area with about 2/3 the man-days using this approach. In comparison with manual design, it was also found that the S/N ratio could be reduced from about 6 to 7 dB.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - Analog Standard Cells for A-D and D-A Converters with Δ-Σ Modulators
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 252
EP - 260
AU - Takao KANEKO
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2000
AB - An analog standard cell layout configuration is proposed for simplifying the design and reducing the man-hours for designing mixed analog-digital LSIs, and analog standard cells are fabricated for A-D and D-A converters with Δ-Σ modulators. This works seeks to implement 2-D cell placement with up-down and left-right mirror rotation and shorter high-impedance analog wiring than conventional 1-D placement in order to obtain high-performance analog characteristics. By considering sensitivity to noise, routing channels have been classified into 4 types: high-impedance analog, low-impedance analog, analog-digital, and digital, and efforts have been made to prevent analog wires from crossing over digital wires. In addition to power and analog ground wires, analog standard cells have built-in analog ground wires with attached wells optimized for shielding. These wires are interconnected to a new isolation cell that separates analog circuits from digital circuits and routing channels. Based on the above layout structure, 46 different types of analog standard cells have been designed. Also, the analog part of Δ-Σ type A-D and D-A converters can be automatically designed in conjunction with interactive processing and chips fabricated by using these cells. It was found that, compared to manual design, one could easily obtain a chip occupying less than 1.5-times the area with about 2/3 the man-days using this approach. In comparison with manual design, it was also found that the S/N ratio could be reduced from about 6 to 7 dB.
ER -