The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Neste artigo apresentamos duas contribuições para um conjunto de transformações locais (um conjunto de seleção) para melhorar o desempenho de um circuito muito grande. A primeira contribuição é uma ideia de "nó de preenchimento" e "conjunto de múltiplos separadores". Provamos que a combinação de nó de preenchimento e conjunto de múltiplos separadores fornece o conjunto de seleção ideal. A segunda contribuição é nosso método heurístico para encontrar um conjunto multi-separador semi-ótimo, que utiliza um algoritmo de fluxo de rede. Nosso método é robusto para circuitos muito grandes, pois seu uso de memória e tempo de cálculo são de ordem linear e polinomial com o tamanho do circuito. Comparamos nosso método com o método da função de seleção de Singh, que fornece o conjunto de seleção ideal e é o melhor método na literatura até o momento. Nosso método otimizou com sucesso os atrasos de todos os circuitos, enquanto o método da função de seleção de Singh abortou três circuitos grandes devido ao estouro de memória. Os resultados também mostraram que nosso método tem uma capacidade comparável na otimização de atrasos ao método de Singh, embora nosso método seja heurístico.
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Yutaka TAMIYA, "Robust Performance Optimization Using Padding Nodes and Separator Sets" in IEICE TRANSACTIONS on Fundamentals,
vol. E84-A, no. 11, pp. 2739-2745, November 2001, doi: .
Abstract: In this paper we present two contributions for a set of local transformations (a selection set) to improve a performance of a very large circuit. The first contribution is an idea of "padding node" and "multi-separator-set. " We have proven that combination of padding node and multi-separator-set provides the optimum selection set. The second contribution is our heuristic method to find a semi-optimum multi-separator-set, which uses a network flow algorithm. Our method is robust for very large circuits, because its memory usage and calculation time are linear and polynomial order with the size of the circuit. We have compared our method with Singh's selection function method, which provides the optimum selection set and is the best method in literature to date. Our method has successfully optimized delays of all circuits, while Singh's selection function method has aborted with three large circuits because of memory overflow. The results also has shown our method has a comparable capability in delay optimization to Singh's method, although our method is heuristic.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e84-a_11_2739/_p
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@ARTICLE{e84-a_11_2739,
author={Yutaka TAMIYA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Robust Performance Optimization Using Padding Nodes and Separator Sets},
year={2001},
volume={E84-A},
number={11},
pages={2739-2745},
abstract={In this paper we present two contributions for a set of local transformations (a selection set) to improve a performance of a very large circuit. The first contribution is an idea of "padding node" and "multi-separator-set. " We have proven that combination of padding node and multi-separator-set provides the optimum selection set. The second contribution is our heuristic method to find a semi-optimum multi-separator-set, which uses a network flow algorithm. Our method is robust for very large circuits, because its memory usage and calculation time are linear and polynomial order with the size of the circuit. We have compared our method with Singh's selection function method, which provides the optimum selection set and is the best method in literature to date. Our method has successfully optimized delays of all circuits, while Singh's selection function method has aborted with three large circuits because of memory overflow. The results also has shown our method has a comparable capability in delay optimization to Singh's method, although our method is heuristic.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - Robust Performance Optimization Using Padding Nodes and Separator Sets
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2739
EP - 2745
AU - Yutaka TAMIYA
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E84-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 2001
AB - In this paper we present two contributions for a set of local transformations (a selection set) to improve a performance of a very large circuit. The first contribution is an idea of "padding node" and "multi-separator-set. " We have proven that combination of padding node and multi-separator-set provides the optimum selection set. The second contribution is our heuristic method to find a semi-optimum multi-separator-set, which uses a network flow algorithm. Our method is robust for very large circuits, because its memory usage and calculation time are linear and polynomial order with the size of the circuit. We have compared our method with Singh's selection function method, which provides the optimum selection set and is the best method in literature to date. Our method has successfully optimized delays of all circuits, while Singh's selection function method has aborted with three large circuits because of memory overflow. The results also has shown our method has a comparable capability in delay optimization to Singh's method, although our method is heuristic.
ER -