The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo discute um efeito estatístico da otimização de desempenho na incerteza no atraso do circuito. A otimização do desempenho tem o efeito de equilibrar o atraso de cada caminho em um circuito, ou seja, os tempos de atraso dos caminhos longos são reduzidos e os tempos de atraso dos caminhos curtos são aumentados. Nestes circuitos com trajetória balanceada, a incerteza no atraso do circuito, que é causada por erro de cálculo do atraso, variabilidade de fabricação, flutuação da condição operacional, etc., torna-se pior por uma característica estatística do atraso do circuito. Assim, um circuito altamente otimizado pode não satisfazer as restrições de atraso. Neste artigo, demonstramos alguns exemplos de que a incerteza no atraso do circuito é aumentada pelo balanceamento de caminho e, em seguida, levantamos o problema de que a otimização do desempenho aumenta o atraso do circuito distribuído estatisticamente.
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Masanori HASHIMOTO, Hidetoshi ONODERA, "Increase in Delay Uncertainty by Performance Optimization" in IEICE TRANSACTIONS on Fundamentals,
vol. E85-A, no. 12, pp. 2799-2802, December 2002, doi: .
Abstract: This paper discusses a statistical effect of performance optimization to uncertainty in circuit delay. Performance optimization has an effect of balancing the delay of each path in a circuit, i.e. the delay times of long paths are shortened and the delay times of short paths are lengthened. In these path-balanced circuits, the uncertainty in circuit delay, which is caused by delay calculation error, manufacturing variability, fluctuation of operating condition, etc., becomes worse by a statistical characteristic of circuit delay. Thus, a highly-optimized circuit may not satisfy delay constraints. In this paper, we demonstrate some examples that uncertainty in circuit delay is increased by path-balancing, and we then raise a problem that performance optimization increases statistically-distributed circuit delay.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_12_2799/_p
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@ARTICLE{e85-a_12_2799,
author={Masanori HASHIMOTO, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Increase in Delay Uncertainty by Performance Optimization},
year={2002},
volume={E85-A},
number={12},
pages={2799-2802},
abstract={This paper discusses a statistical effect of performance optimization to uncertainty in circuit delay. Performance optimization has an effect of balancing the delay of each path in a circuit, i.e. the delay times of long paths are shortened and the delay times of short paths are lengthened. In these path-balanced circuits, the uncertainty in circuit delay, which is caused by delay calculation error, manufacturing variability, fluctuation of operating condition, etc., becomes worse by a statistical characteristic of circuit delay. Thus, a highly-optimized circuit may not satisfy delay constraints. In this paper, we demonstrate some examples that uncertainty in circuit delay is increased by path-balancing, and we then raise a problem that performance optimization increases statistically-distributed circuit delay.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Increase in Delay Uncertainty by Performance Optimization
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2799
EP - 2802
AU - Masanori HASHIMOTO
AU - Hidetoshi ONODERA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2002
AB - This paper discusses a statistical effect of performance optimization to uncertainty in circuit delay. Performance optimization has an effect of balancing the delay of each path in a circuit, i.e. the delay times of long paths are shortened and the delay times of short paths are lengthened. In these path-balanced circuits, the uncertainty in circuit delay, which is caused by delay calculation error, manufacturing variability, fluctuation of operating condition, etc., becomes worse by a statistical characteristic of circuit delay. Thus, a highly-optimized circuit may not satisfy delay constraints. In this paper, we demonstrate some examples that uncertainty in circuit delay is increased by path-balancing, and we then raise a problem that performance optimization increases statistically-distributed circuit delay.
ER -