The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Um sistema ADC intercalado no tempo é uma maneira eficaz de implementar um ADC de alta taxa de amostragem com circuitos relativamente lentos. No sistema, vários ADCs de canais operam em tempos de amostragem intercalados, como se fossem efetivamente um único ADC operando a uma taxa de amostragem muito mais alta. As incompatibilidades entre os ADCs de canal degradam o SNR e o SFDR do sistema ADC como um todo, e os efeitos das incompatibilidades de deslocamento, ganho e largura de banda, bem como a distorção de tempo dos clocks distribuídos aos canais, foram bem investigados. Este artigo investiga o canal incompatibilidade de linearidade efeitos no sistema ADC intercalado no tempo, que são muito importantes na prática, mas não foram investigados anteriormente. Consideramos dois casos: casos de incompatibilidade de não linearidade diferencial e casos de incompatibilidade de não linearidade integral. Nossa simulação numérica mostra características distintas dessa incompatibilidade, especialmente no domínio da frequência. Os resultados derivados podem ser úteis para derivar algoritmos de calibração para compensar os efeitos de incompatibilidade de canal.
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Naoki KUROSAWA, Haruo KOBAYASHI, Kensuke KOBAYASHI, "Channel Linearity Mismatch Effects in Time-Interleaved ADC Systems" in IEICE TRANSACTIONS on Fundamentals,
vol. E85-A, no. 4, pp. 749-756, April 2002, doi: .
Abstract: A time-interleaved ADC system is an effective way to implement a high-sampling-rate ADC with relatively slow circuits. In the system, several channel ADCs operate at interleaved sampling times as if they were effectively a single ADC operating at a much higher sampling rate. Mismatches among channel ADCs degrade SNR and SFDR of the ADC system as a whole, and the effects of offset, gain and bandwidth mismatches as well as timing skew of the clocks distributed to the channels have been well investigated. This paper investigates the channel linearity mismatch effects in the time-interleaved ADC system, which are very important in practice but had not been investigated previously. We consider two cases: differential nonlinearity mismatch and integral nonlinearity mismatch cases. Our numerical simulation shows distinct features of such mismatch especially in frequency domain. The derived results can be useful for deriving calibration algorithms to compensate for the channel mismatch effects.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_4_749/_p
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@ARTICLE{e85-a_4_749,
author={Naoki KUROSAWA, Haruo KOBAYASHI, Kensuke KOBAYASHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Channel Linearity Mismatch Effects in Time-Interleaved ADC Systems},
year={2002},
volume={E85-A},
number={4},
pages={749-756},
abstract={A time-interleaved ADC system is an effective way to implement a high-sampling-rate ADC with relatively slow circuits. In the system, several channel ADCs operate at interleaved sampling times as if they were effectively a single ADC operating at a much higher sampling rate. Mismatches among channel ADCs degrade SNR and SFDR of the ADC system as a whole, and the effects of offset, gain and bandwidth mismatches as well as timing skew of the clocks distributed to the channels have been well investigated. This paper investigates the channel linearity mismatch effects in the time-interleaved ADC system, which are very important in practice but had not been investigated previously. We consider two cases: differential nonlinearity mismatch and integral nonlinearity mismatch cases. Our numerical simulation shows distinct features of such mismatch especially in frequency domain. The derived results can be useful for deriving calibration algorithms to compensate for the channel mismatch effects.},
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - Channel Linearity Mismatch Effects in Time-Interleaved ADC Systems
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 749
EP - 756
AU - Naoki KUROSAWA
AU - Haruo KOBAYASHI
AU - Kensuke KOBAYASHI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2002
AB - A time-interleaved ADC system is an effective way to implement a high-sampling-rate ADC with relatively slow circuits. In the system, several channel ADCs operate at interleaved sampling times as if they were effectively a single ADC operating at a much higher sampling rate. Mismatches among channel ADCs degrade SNR and SFDR of the ADC system as a whole, and the effects of offset, gain and bandwidth mismatches as well as timing skew of the clocks distributed to the channels have been well investigated. This paper investigates the channel linearity mismatch effects in the time-interleaved ADC system, which are very important in practice but had not been investigated previously. We consider two cases: differential nonlinearity mismatch and integral nonlinearity mismatch cases. Our numerical simulation shows distinct features of such mismatch especially in frequency domain. The derived results can be useful for deriving calibration algorithms to compensate for the channel mismatch effects.
ER -