The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Vários tipos de códigos capacitivos para evitar crosstalk foram concebidos para evitar diafonia capacitiva em barramentos on-chip. Esses códigos são projetados para proibir padrões de transição propensos a diafonia capacitiva de quaisquer duas palavras consecutivas transmitidas para barramentos no chip. O presente artigo fornece uma análise rigorosa da taxa assintótica para (p,q) - sequências de palavras livres de transição sob a suposição de que a codificação é baseada em um codificador com estado e um decodificador sem estado. Aqui, p e q representar kpadrões de transição de bits que não devem aparecer em duas palavras consecutivas na mesma palavra adjacente kposições de bits. A taxa máxima para as sequências é comprovadamente igual à subgrafo número domático do (p,q)-gráfico livre de transição. Com base nos resultados teóricos para o problema da partição domática do subgrafo, são derivados os limites inferior e superior da taxa assintótica. Mostramos também que a taxa assintótica de 0.8325 é alcançável para p= 01 e q=10 sequências de palavras sem transição.
Tadashi WADAYAMA
the Nagoya Institute of Technology
Taisuke IZUMI
the Nagoya Institute of Technology
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copiar
Tadashi WADAYAMA, Taisuke IZUMI, "Bounds on the Asymptotic Rate for Capacitive Crosstalk Avoidance Codes for On-Chip Buses" in IEICE TRANSACTIONS on Fundamentals,
vol. E101-A, no. 12, pp. 2018-2025, December 2018, doi: 10.1587/transfun.E101.A.2018.
Abstract: Several types of capacitive crosstalk avoidance codes have been devised in order to prevent capacitive crosstalk in on-chip buses. These codes are designed to prohibit transition patterns prone to capacitive crosstalk from any two consecutive words transmitted to on-chip buses. The present paper provides a rigorous analysis of the asymptotic rate for (p,q)-transition free word sequences under the assumption that coding is based on a stateful encoder and a stateless decoder. Here, p and q represent k-bit transition patterns that should not appear in any two consecutive words at the same adjacent k-bit positions. The maximum rate for the sequences is proven to be equal to the subgraph domatic number of the (p,q)-transition free graph. Based on the theoretical results for the subgraph domatic partition problem, lower and upper bounds on the asymptotic rate are derived. We also show that the asymptotic rate 0.8325 is achievable for p=01 and q=10 transition free word sequences.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E101.A.2018/_p
Copiar
@ARTICLE{e101-a_12_2018,
author={Tadashi WADAYAMA, Taisuke IZUMI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Bounds on the Asymptotic Rate for Capacitive Crosstalk Avoidance Codes for On-Chip Buses},
year={2018},
volume={E101-A},
number={12},
pages={2018-2025},
abstract={Several types of capacitive crosstalk avoidance codes have been devised in order to prevent capacitive crosstalk in on-chip buses. These codes are designed to prohibit transition patterns prone to capacitive crosstalk from any two consecutive words transmitted to on-chip buses. The present paper provides a rigorous analysis of the asymptotic rate for (p,q)-transition free word sequences under the assumption that coding is based on a stateful encoder and a stateless decoder. Here, p and q represent k-bit transition patterns that should not appear in any two consecutive words at the same adjacent k-bit positions. The maximum rate for the sequences is proven to be equal to the subgraph domatic number of the (p,q)-transition free graph. Based on the theoretical results for the subgraph domatic partition problem, lower and upper bounds on the asymptotic rate are derived. We also show that the asymptotic rate 0.8325 is achievable for p=01 and q=10 transition free word sequences.},
keywords={},
doi={10.1587/transfun.E101.A.2018},
ISSN={1745-1337},
month={December},}
Copiar
TY - JOUR
TI - Bounds on the Asymptotic Rate for Capacitive Crosstalk Avoidance Codes for On-Chip Buses
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2018
EP - 2025
AU - Tadashi WADAYAMA
AU - Taisuke IZUMI
PY - 2018
DO - 10.1587/transfun.E101.A.2018
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E101-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2018
AB - Several types of capacitive crosstalk avoidance codes have been devised in order to prevent capacitive crosstalk in on-chip buses. These codes are designed to prohibit transition patterns prone to capacitive crosstalk from any two consecutive words transmitted to on-chip buses. The present paper provides a rigorous analysis of the asymptotic rate for (p,q)-transition free word sequences under the assumption that coding is based on a stateful encoder and a stateless decoder. Here, p and q represent k-bit transition patterns that should not appear in any two consecutive words at the same adjacent k-bit positions. The maximum rate for the sequences is proven to be equal to the subgraph domatic number of the (p,q)-transition free graph. Based on the theoretical results for the subgraph domatic partition problem, lower and upper bounds on the asymptotic rate are derived. We also show that the asymptotic rate 0.8325 is achievable for p=01 and q=10 transition free word sequences.
ER -