The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Os códigos de verificação de paridade de baixa densidade (LDPC) podem ser usados para melhorar a confiabilidade do armazenamento de memórias flash de células multiníveis (MLC) devido à sua forte capacidade de correção de erros. A fim de melhorar a decodificação de inversão de bits ponderada (WBF) de códigos LDPC em memórias flash MLC com interferência célula a célula (CCI), propomos duas estratégias de normalização de pesos e ajuste de valores de razão de verossimilhança logarítmica (LLR). Os resultados da simulação mostram que a decodificação WBF sob as estratégias propostas é muito vantajosa tanto no desempenho de erro quanto de convergência em relação aos algoritmos de decodificação WBF existentes. Com base na análise de complexidade, as estratégias proporcionam à decodificação WBF um bom equilíbrio entre desempenho e complexidade.
Xuan ZHANG
Xidian University
Xiaopeng JIAO
Xidian University
Yu-Cheng HE
Huaqiao University,Xidian University
Jianjun MU
Xidian University
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Xuan ZHANG, Xiaopeng JIAO, Yu-Cheng HE, Jianjun MU, "Weighted Bit-Flipping Decoding of LDPC Codes with LLR Adjustment for MLC Flash Memories" in IEICE TRANSACTIONS on Fundamentals,
vol. E102-A, no. 11, pp. 1571-1574, November 2019, doi: 10.1587/transfun.E102.A.1571.
Abstract: Low-density parity-check (LDPC) codes can be used to improve the storage reliability of multi-level cell (MLC) flash memories because of their strong error-correcting capability. In order to improve the weighted bit-flipping (WBF) decoding of LDPC codes in MLC flash memories with cell-to-cell interference (CCI), we propose two strategies of normalizing weights and adjusting log-likelihood ratio (LLR) values. Simulation results show that the WBF decoding under the proposed strategies is much advantageous in both error and convergence performances over existing WBF decoding algorithms. Based on complexity analysis, the strategies provide the WBF decoding with a good tradeoff between performance and complexity.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E102.A.1571/_p
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@ARTICLE{e102-a_11_1571,
author={Xuan ZHANG, Xiaopeng JIAO, Yu-Cheng HE, Jianjun MU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Weighted Bit-Flipping Decoding of LDPC Codes with LLR Adjustment for MLC Flash Memories},
year={2019},
volume={E102-A},
number={11},
pages={1571-1574},
abstract={Low-density parity-check (LDPC) codes can be used to improve the storage reliability of multi-level cell (MLC) flash memories because of their strong error-correcting capability. In order to improve the weighted bit-flipping (WBF) decoding of LDPC codes in MLC flash memories with cell-to-cell interference (CCI), we propose two strategies of normalizing weights and adjusting log-likelihood ratio (LLR) values. Simulation results show that the WBF decoding under the proposed strategies is much advantageous in both error and convergence performances over existing WBF decoding algorithms. Based on complexity analysis, the strategies provide the WBF decoding with a good tradeoff between performance and complexity.},
keywords={},
doi={10.1587/transfun.E102.A.1571},
ISSN={1745-1337},
month={November},}
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TY - JOUR
TI - Weighted Bit-Flipping Decoding of LDPC Codes with LLR Adjustment for MLC Flash Memories
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1571
EP - 1574
AU - Xuan ZHANG
AU - Xiaopeng JIAO
AU - Yu-Cheng HE
AU - Jianjun MU
PY - 2019
DO - 10.1587/transfun.E102.A.1571
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E102-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 2019
AB - Low-density parity-check (LDPC) codes can be used to improve the storage reliability of multi-level cell (MLC) flash memories because of their strong error-correcting capability. In order to improve the weighted bit-flipping (WBF) decoding of LDPC codes in MLC flash memories with cell-to-cell interference (CCI), we propose two strategies of normalizing weights and adjusting log-likelihood ratio (LLR) values. Simulation results show that the WBF decoding under the proposed strategies is much advantageous in both error and convergence performances over existing WBF decoding algorithms. Based on complexity analysis, the strategies provide the WBF decoding with a good tradeoff between performance and complexity.
ER -