The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo apresenta uma estrutura de implementação de receptor multimodo totalmente digital usando conversão direta de RF para digital. Nesta arquitetura, toda a banda, incluindo vários sistemas de RF, é diretamente convertida em digital por um ADC de banda larga de alta velocidade, e os sistemas de RF podem ser facilmente comutados apenas pelo processamento de sinal digital com os componentes de RF analógicos mínimos. O front-end de RF digital consiste em blocos de processamento paralelo para fluxos de dados paralelos, considerando a configuração prática do ADC. Os sinais de RF são convertidos em banda base através do estágio IF digital e as taxas de dados são reduzidas em duas etapas de dizimação. Neste artigo, uma investigação principal sobre a implementação de um sistema dualmode é apresentada para simplificar. Serão apresentados os recursos do circuito e a robustez aos spurs (saídas espúrias) de um NCO (oscilador controlado numericamente) no projeto proposto. A arquitetura proposta foi implementada com um FPGA no sistema protótipo desenvolvido e as operações também foram verificadas.
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Minseok KIM, Takayuki MOTEKI, Koichi ICHIGE, Hiroyuki ARAI, "Efficient Heterodyne Digital Receiver with Direct RF-to-Digital Conversion for Software Defined Radio" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 4, pp. 1056-1062, April 2009, doi: 10.1587/transfun.E92.A.1056.
Abstract: This paper presents a framework of multimode fully digital receiver implementation using direct RF-to-digital conversion. In this architecture the entire band including multiple RF systems is directly converted to digital by a wideband high speed ADC, and the RF systems can be easily switched by only digital signal processing with the minimum analog RF components. The digital RF front-end consists of parallel processing blocks for parallel data streams considering practical ADC's configuration. The RF signals are converted into baseband through digital IF stage and the data rates are made down by two steps of decimation. In this paper, a principle investigation into a dualmode system implementation is presented for simplicity. The circuit resource and the robustness to the spurs (spurious outputs) of an NCO (numerically controlled oscillator) in the proposed design will be presented. The proposed architecture was implemented with an FPGA on the developed prototype system and the operations were also verified.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.1056/_p
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@ARTICLE{e92-a_4_1056,
author={Minseok KIM, Takayuki MOTEKI, Koichi ICHIGE, Hiroyuki ARAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Efficient Heterodyne Digital Receiver with Direct RF-to-Digital Conversion for Software Defined Radio},
year={2009},
volume={E92-A},
number={4},
pages={1056-1062},
abstract={This paper presents a framework of multimode fully digital receiver implementation using direct RF-to-digital conversion. In this architecture the entire band including multiple RF systems is directly converted to digital by a wideband high speed ADC, and the RF systems can be easily switched by only digital signal processing with the minimum analog RF components. The digital RF front-end consists of parallel processing blocks for parallel data streams considering practical ADC's configuration. The RF signals are converted into baseband through digital IF stage and the data rates are made down by two steps of decimation. In this paper, a principle investigation into a dualmode system implementation is presented for simplicity. The circuit resource and the robustness to the spurs (spurious outputs) of an NCO (numerically controlled oscillator) in the proposed design will be presented. The proposed architecture was implemented with an FPGA on the developed prototype system and the operations were also verified.},
keywords={},
doi={10.1587/transfun.E92.A.1056},
ISSN={1745-1337},
month={April},}
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TY - JOUR
TI - Efficient Heterodyne Digital Receiver with Direct RF-to-Digital Conversion for Software Defined Radio
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1056
EP - 1062
AU - Minseok KIM
AU - Takayuki MOTEKI
AU - Koichi ICHIGE
AU - Hiroyuki ARAI
PY - 2009
DO - 10.1587/transfun.E92.A.1056
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2009
AB - This paper presents a framework of multimode fully digital receiver implementation using direct RF-to-digital conversion. In this architecture the entire band including multiple RF systems is directly converted to digital by a wideband high speed ADC, and the RF systems can be easily switched by only digital signal processing with the minimum analog RF components. The digital RF front-end consists of parallel processing blocks for parallel data streams considering practical ADC's configuration. The RF signals are converted into baseband through digital IF stage and the data rates are made down by two steps of decimation. In this paper, a principle investigation into a dualmode system implementation is presented for simplicity. The circuit resource and the robustness to the spurs (spurious outputs) of an NCO (numerically controlled oscillator) in the proposed design will be presented. The proposed architecture was implemented with an FPGA on the developed prototype system and the operations were also verified.
ER -