The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
O método baseado em linha tem sido um dos métodos mais comumente usados de implementação de hardware de transformada wavelet discreta (DWT) bidimensional (2D). No entanto, o buffer de dados é necessário entre o processador DWT de linha e o processador DWT de coluna para resolver a incompatibilidade de fluxo de dados, o que aumenta o tamanho da memória no chip e a latência de saída. Uma vez que o fluxo de dados incompatível é induzido a partir da propriedade intrínseca do algoritmo baseado em levantamento adotado, um algoritmo de levantamento decomposto (DLA) é apresentado reorganizando o caminho de dados das etapas de levantamento para garantir que os dados da imagem sejam processados no modo de varredura raster no processador de linha e processador de coluna. A análise teórica indica que a questão da precisão do DLA supera outros algoritmos baseados em levantamento em termos de ruído de arredondamento e comprimento interno de palavras. Uma arquitetura baseada em linha com uso eficiente de memória e alto desempenho é proposta com base em DLA sem a implementação de buffer de dados. Para um N
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Peng CAO, Chao WANG, Longxing SHI, "Memory-Efficient and High-Performance Two-Dimensional Discrete Wavelet Transform Architecture Based on Decomposed Lifting Algorithm" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 8, pp. 2000-2008, August 2009, doi: 10.1587/transfun.E92.A.2000.
Abstract: The line-based method has been one of the most commonly-used methods of hardware implementation of two-dimensional (2D) discrete wavelet transform (DWT). However, data buffer is required between the row DWT processor and the column DWT processor to solve the data flow mismatch, which increases the on-chip memory size and the output latency. Since the incompatible data flow is induced from the intrinsic property of adopted lifting-based algorithm, a decomposed lifting algorithm (DLA) is presented by rearranging the data path of lifting steps to ensure that image data is processed in raster scan manner in row processor and column processor. Theoretical analysis indicates that the precision issue of DLA outperforms other lifting-based algorithms in terms of round-off noise and internal word-length. A memory-efficient and high-performance line-based architecture is proposed based on DLA without the implementation of data buffer. For an N
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.2000/_p
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@ARTICLE{e92-a_8_2000,
author={Peng CAO, Chao WANG, Longxing SHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Memory-Efficient and High-Performance Two-Dimensional Discrete Wavelet Transform Architecture Based on Decomposed Lifting Algorithm},
year={2009},
volume={E92-A},
number={8},
pages={2000-2008},
abstract={The line-based method has been one of the most commonly-used methods of hardware implementation of two-dimensional (2D) discrete wavelet transform (DWT). However, data buffer is required between the row DWT processor and the column DWT processor to solve the data flow mismatch, which increases the on-chip memory size and the output latency. Since the incompatible data flow is induced from the intrinsic property of adopted lifting-based algorithm, a decomposed lifting algorithm (DLA) is presented by rearranging the data path of lifting steps to ensure that image data is processed in raster scan manner in row processor and column processor. Theoretical analysis indicates that the precision issue of DLA outperforms other lifting-based algorithms in terms of round-off noise and internal word-length. A memory-efficient and high-performance line-based architecture is proposed based on DLA without the implementation of data buffer. For an N
keywords={},
doi={10.1587/transfun.E92.A.2000},
ISSN={1745-1337},
month={August},}
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TY - JOUR
TI - Memory-Efficient and High-Performance Two-Dimensional Discrete Wavelet Transform Architecture Based on Decomposed Lifting Algorithm
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2000
EP - 2008
AU - Peng CAO
AU - Chao WANG
AU - Longxing SHI
PY - 2009
DO - 10.1587/transfun.E92.A.2000
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 2009
AB - The line-based method has been one of the most commonly-used methods of hardware implementation of two-dimensional (2D) discrete wavelet transform (DWT). However, data buffer is required between the row DWT processor and the column DWT processor to solve the data flow mismatch, which increases the on-chip memory size and the output latency. Since the incompatible data flow is induced from the intrinsic property of adopted lifting-based algorithm, a decomposed lifting algorithm (DLA) is presented by rearranging the data path of lifting steps to ensure that image data is processed in raster scan manner in row processor and column processor. Theoretical analysis indicates that the precision issue of DLA outperforms other lifting-based algorithms in terms of round-off noise and internal word-length. A memory-efficient and high-performance line-based architecture is proposed based on DLA without the implementation of data buffer. For an N
ER -