The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Nos sistemas UWB, os símbolos de dados são transmitidos e recebidos continuamente. O processador Fast Fourier Transform (FFT) deve ser capaz de processar dados de entrada/saída perfeitamente. Este artigo apresenta o projeto e implementação de um processador FFT baseado em memória paralela de fluxo contínuo de dados (CF-PMBFFT) sem o uso de buffer de entrada para pré-carregar os dados de entrada. O processador realiza um espaço de memória de dois N-palavras e vários elementos de processamento (PEs) para alcançar o fluxo de dados contínuo e atender aos requisitos de design. O circuito foi fabricado no processo TSMC 0.18 µm 1P6M CMOS com tensão de alimentação de 1.8 V. Os resultados da medição do chip de teste mostram que o processador CF-PMBFFT desenvolvido ocupa uma área central de 1.97 mm2 com um consumo de energia de 62.12 mW para uma taxa de transferência de 528 MS/s.
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Chin-Long WEY, Shin-Yo LIN, Hsu-Sheng WANG, Hung-Lieh CHEN, Chun-Ming HUANG, "A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications" in IEICE TRANSACTIONS on Fundamentals,
vol. E94-A, no. 1, pp. 315-323, January 2011, doi: 10.1587/transfun.E94.A.315.
Abstract: In UWB systems, data symbols are transmitted and received continuously. The Fast Fourier Transform (FFT) processor must be able to seamlessly process input/output data. This paper presents the design and implementation of a continuous data flow parallel memory-based FFT (CF-PMBFFT) processor without the use of input buffer for pre-loading the input data. The processor realizes a memory space of two N-words and multiple processing elements (PEs) to achieve the seamless data flow and meet the design requirement. The circuit has been fabricated in TSMC 0.18 µm 1P6M CMOS process with the supply voltage of 1.8 V. Measurement results of the test chip shows that the developed CF-PMBFFT processor takes a core area of 1.97 mm2 with a power consumption of 62.12 mW for a throughput rate of 528 MS/s.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E94.A.315/_p
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@ARTICLE{e94-a_1_315,
author={Chin-Long WEY, Shin-Yo LIN, Hsu-Sheng WANG, Hung-Lieh CHEN, Chun-Ming HUANG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications},
year={2011},
volume={E94-A},
number={1},
pages={315-323},
abstract={In UWB systems, data symbols are transmitted and received continuously. The Fast Fourier Transform (FFT) processor must be able to seamlessly process input/output data. This paper presents the design and implementation of a continuous data flow parallel memory-based FFT (CF-PMBFFT) processor without the use of input buffer for pre-loading the input data. The processor realizes a memory space of two N-words and multiple processing elements (PEs) to achieve the seamless data flow and meet the design requirement. The circuit has been fabricated in TSMC 0.18 µm 1P6M CMOS process with the supply voltage of 1.8 V. Measurement results of the test chip shows that the developed CF-PMBFFT processor takes a core area of 1.97 mm2 with a power consumption of 62.12 mW for a throughput rate of 528 MS/s.},
keywords={},
doi={10.1587/transfun.E94.A.315},
ISSN={1745-1337},
month={January},}
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TY - JOUR
TI - A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 315
EP - 323
AU - Chin-Long WEY
AU - Shin-Yo LIN
AU - Hsu-Sheng WANG
AU - Hung-Lieh CHEN
AU - Chun-Ming HUANG
PY - 2011
DO - 10.1587/transfun.E94.A.315
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E94-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2011
AB - In UWB systems, data symbols are transmitted and received continuously. The Fast Fourier Transform (FFT) processor must be able to seamlessly process input/output data. This paper presents the design and implementation of a continuous data flow parallel memory-based FFT (CF-PMBFFT) processor without the use of input buffer for pre-loading the input data. The processor realizes a memory space of two N-words and multiple processing elements (PEs) to achieve the seamless data flow and meet the design requirement. The circuit has been fabricated in TSMC 0.18 µm 1P6M CMOS process with the supply voltage of 1.8 V. Measurement results of the test chip shows that the developed CF-PMBFFT processor takes a core area of 1.97 mm2 with a power consumption of 62.12 mW for a throughput rate of 528 MS/s.
ER -