The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Este artigo apresenta um conversor DC-DC elevador/redutor com três modos de operação para alcançar alta eficiência e pequena tensão de ondulação de saída. Um modo buck-boost de tempo constante, que é inserido entre o modo buck e o modo boost, é proposto para obter uma transição suave. Com o modo proposto, a ondulação da tensão de saída é significativamente reduzida quando a tensão de entrada é aproximada da tensão de saída. Além disso, o novo esquema de controle minimiza a perda de condução, reduzindo a corrente média do indutor e a perda de comutação, fazendo o conversor operar como um conversor buck ou boost. O modelo de pequenos sinais do conversor DC-DC elevador/redutor também é derivado para orientar o projeto da rede de compensação. O conversor elevador/redutor foi projetado com um processo CMOS de n poços de 0.5 µm e pode regular uma tensão de saída dentro da tensão de entrada variando de 2.5 V a 5.5 V com uma eficiência de energia máxima de 96%. Os resultados da simulação mostram que o conversor proposto apresenta uma tensão de ondulação de saída de 28 mV no modo de transição.
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Yanzhao MA, Hongyi WANG, Guican CHEN, "Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition" in IEICE TRANSACTIONS on Fundamentals,
vol. E94-A, no. 2, pp. 646-652, February 2011, doi: 10.1587/transfun.E94.A.646.
Abstract: This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E94.A.646/_p
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@ARTICLE{e94-a_2_646,
author={Yanzhao MA, Hongyi WANG, Guican CHEN, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition},
year={2011},
volume={E94-A},
number={2},
pages={646-652},
abstract={This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.},
keywords={},
doi={10.1587/transfun.E94.A.646},
ISSN={1745-1337},
month={February},}
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TY - JOUR
TI - Design and Modeling of a High Efficiency Step-Up/Step-Down DC-DC Converter with Smooth Transition
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 646
EP - 652
AU - Yanzhao MA
AU - Hongyi WANG
AU - Guican CHEN
PY - 2011
DO - 10.1587/transfun.E94.A.646
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E94-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2011
AB - This paper presents a step-up/step-down DC-DC converter with three operation modes to achieve high efficiency and small output ripple voltage. A constant time buck-boost mode, which is inserted between buck mode and boost mode, is proposed to achieve smooth transition. With the proposed mode, the output ripple voltage is significantly reduced when the input voltage is approximate to the output voltage. Besides, the novel control scheme minimizes the conduction loss by reducing the average inductor current and the switching loss by making the converter operate like a buck or boost converter. The small signal model of the step-up/step-down DC-DC converter is also derived to guide the compensation network design. The step-up/step-down converter is designed with a 0.5 µm CMOS n-well process, and can regulate an output voltage within the input voltage ranged from 2.5 V to 5.5 V with a maximum power efficiency of 96%. The simulation results show that the proposed converter exhibits an output ripple voltage of 28 mV in the transition mode.
ER -