The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
A computação de alto desempenho (HPC) penetrou em vários campos de pesquisa, mas o aumento do poder computacional é limitado pelas interconexões elétricas convencionais. A arquitetura proposta, NEST, explora o roteamento de comprimento de onda em roteadores de grade de guia de ondas (AWGRs) para obter uma rede escalonável, de baixa latência e de alto rendimento. Para a comunicação intra pod e inter pod, a topologia simétrica do NEST reduz o diâmetro da rede, o que leva a um aumento no desempenho da latência. Além disso, a arquitetura proposta permite um crescimento exponencial do tamanho da rede. Os resultados da simulação demonstram que o NEST apresenta uma melhoria de 36% na latência e uma melhoria de 30% no rendimento em relação ao libélula, em média.
Yunfeng LU
Xidian University
Huaxi GU
Xidian University
Xiaoshan YU
Xidian University
Kun WANG
Xidian University
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copiar
Yunfeng LU, Huaxi GU, Xiaoshan YU, Kun WANG, "NEST: Towards Extreme Scale Computing Systems" in IEICE TRANSACTIONS on Information,
vol. E101-D, no. 11, pp. 2827-2830, November 2018, doi: 10.1587/transinf.2018EDL8148.
Abstract: High-performance computing (HPC) has penetrated into various research fields, yet the increase in computing power is limited by conventional electrical interconnections. The proposed architecture, NEST, exploits wavelength routing in arrayed waveguide grating routers (AWGRs) to achieve a scalable, low-latency, and high-throughput network. For the intra pod and inter pod communication, the symmetrical topology of NEST reduces the network diameter, which leads to an increase in latency performance. Moreover, the proposed architecture enables exponential growth of network size. Simulation results demonstrate that NEST shows 36% latency improvement and 30% throughput improvement over the dragonfly on an average.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2018EDL8148/_p
Copiar
@ARTICLE{e101-d_11_2827,
author={Yunfeng LU, Huaxi GU, Xiaoshan YU, Kun WANG, },
journal={IEICE TRANSACTIONS on Information},
title={NEST: Towards Extreme Scale Computing Systems},
year={2018},
volume={E101-D},
number={11},
pages={2827-2830},
abstract={High-performance computing (HPC) has penetrated into various research fields, yet the increase in computing power is limited by conventional electrical interconnections. The proposed architecture, NEST, exploits wavelength routing in arrayed waveguide grating routers (AWGRs) to achieve a scalable, low-latency, and high-throughput network. For the intra pod and inter pod communication, the symmetrical topology of NEST reduces the network diameter, which leads to an increase in latency performance. Moreover, the proposed architecture enables exponential growth of network size. Simulation results demonstrate that NEST shows 36% latency improvement and 30% throughput improvement over the dragonfly on an average.},
keywords={},
doi={10.1587/transinf.2018EDL8148},
ISSN={1745-1361},
month={November},}
Copiar
TY - JOUR
TI - NEST: Towards Extreme Scale Computing Systems
T2 - IEICE TRANSACTIONS on Information
SP - 2827
EP - 2830
AU - Yunfeng LU
AU - Huaxi GU
AU - Xiaoshan YU
AU - Kun WANG
PY - 2018
DO - 10.1587/transinf.2018EDL8148
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E101-D
IS - 11
JA - IEICE TRANSACTIONS on Information
Y1 - November 2018
AB - High-performance computing (HPC) has penetrated into various research fields, yet the increase in computing power is limited by conventional electrical interconnections. The proposed architecture, NEST, exploits wavelength routing in arrayed waveguide grating routers (AWGRs) to achieve a scalable, low-latency, and high-throughput network. For the intra pod and inter pod communication, the symmetrical topology of NEST reduces the network diameter, which leads to an increase in latency performance. Moreover, the proposed architecture enables exponential growth of network size. Simulation results demonstrate that NEST shows 36% latency improvement and 30% throughput improvement over the dragonfly on an average.
ER -