The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Esta carta revela que um flip-flop mestre-escravo (FF) acionado por borda usando DICE (célula de armazenamento dupla intertravada) bem conhecido e tolerante a erros suaves é vulnerável a erros suaves que ocorrem em torno da borda do clock. Esta carta apresenta um projeto de um FF tolerante a erros suave baseado no FF mestre-escravo usando DICE. O projeto proposto modifica a conexão entre as travas mestre e escravo para tornar o FF não vulnerável a esses erros. A sobrecarga de hardware é quase a mesma do FF original acionado por borda usando o DICE.
Kazuteru NAMBA
Chiba University
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Kazuteru NAMBA, "Master-Slave FF Using DICE Capable of Tolerating Soft Errors Occurring Around Clock Edge" in IEICE TRANSACTIONS on Information,
vol. E103-D, no. 4, pp. 892-895, April 2020, doi: 10.1587/transinf.2019EDL8175.
Abstract: This letter reveals that an edge-triggered master-slave flip-flop (FF) using well-known soft error tolerant DICE (dual interlocked storage cell) is vulnerable to soft errors occurring around clock edge. This letter presents a design of a soft error tolerant FF based on the master-slave FF using DICE. The proposed design modifies the connection between the master and slave latches to make the FF not vulnerable to these errors. The hardware overhead is almost the same as that for the original edge-triggered FF using the DICE.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2019EDL8175/_p
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@ARTICLE{e103-d_4_892,
author={Kazuteru NAMBA, },
journal={IEICE TRANSACTIONS on Information},
title={Master-Slave FF Using DICE Capable of Tolerating Soft Errors Occurring Around Clock Edge},
year={2020},
volume={E103-D},
number={4},
pages={892-895},
abstract={This letter reveals that an edge-triggered master-slave flip-flop (FF) using well-known soft error tolerant DICE (dual interlocked storage cell) is vulnerable to soft errors occurring around clock edge. This letter presents a design of a soft error tolerant FF based on the master-slave FF using DICE. The proposed design modifies the connection between the master and slave latches to make the FF not vulnerable to these errors. The hardware overhead is almost the same as that for the original edge-triggered FF using the DICE.},
keywords={},
doi={10.1587/transinf.2019EDL8175},
ISSN={1745-1361},
month={April},}
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TY - JOUR
TI - Master-Slave FF Using DICE Capable of Tolerating Soft Errors Occurring Around Clock Edge
T2 - IEICE TRANSACTIONS on Information
SP - 892
EP - 895
AU - Kazuteru NAMBA
PY - 2020
DO - 10.1587/transinf.2019EDL8175
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E103-D
IS - 4
JA - IEICE TRANSACTIONS on Information
Y1 - April 2020
AB - This letter reveals that an edge-triggered master-slave flip-flop (FF) using well-known soft error tolerant DICE (dual interlocked storage cell) is vulnerable to soft errors occurring around clock edge. This letter presents a design of a soft error tolerant FF based on the master-slave FF using DICE. The proposed design modifies the connection between the master and slave latches to make the FF not vulnerable to these errors. The hardware overhead is almost the same as that for the original edge-triggered FF using the DICE.
ER -